CY14B104NA software store/recall

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cross mob
Anonymous
Not applicable

 Hi all,

   

We are using the CY14B104NA on our board, have problem with the software store/recall function.

   

The hardware seems fine, hardware sotre(by pull HSB low) operation works. 

   

During READ mode, the CE, WE and OE signal looks correct too.

   

 

   

I'd like to ask, is there any code example on how to use the software store/recall function?

   

below is my code, can you please take a look to check if anything goes wrong? 

   

Thanks a lot!

   

############################################

   

        p = NV_SRAM_BASE_ADRS + (0x4E38 );  /* NV_SRAM_BASE_ADRS  is the base address of SRAM */

   

val = *((UINT16*)p);

   

 

   

p = NV_SRAM_BASE_ADRS + (0xB1C7 );

   

val = *((UINT16*)p);

   

 

   

p = NV_SRAM_BASE_ADRS + (0x83E0 );

   

val = *((UINT16*)p);

   

 

   

p = NV_SRAM_BASE_ADRS + (0x7C1F );

   

val = *((UINT16*)p);

   

 

   

p = NV_SRAM_BASE_ADRS + (0x703F );

   

val = *((UINT16*)p);

   

 

   

p = NV_SRAM_BASE_ADRS + (0x8FC0 );

   

val = *((UINT16*)p);

   

#####################################################

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1 Solution
ShivendraSingh
Employee
Employee
25 solutions authored 50 replies posted 10 solutions authored

Hi,

   

Sequence for the software store looks correct. The last (16 address bits) 4 nibbles of the base address should be 0x0000 so that ORing doesn't change the address values during the read command sequence. Also, please make sure that the read operation is either a /OE toggle read or a /CE toggle read. The Address toggle read doesn't execute NV commands in the nvSRAM.

   

Thanks,

   

Shivendra

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1 Reply
ShivendraSingh
Employee
Employee
25 solutions authored 50 replies posted 10 solutions authored

Hi,

   

Sequence for the software store looks correct. The last (16 address bits) 4 nibbles of the base address should be 0x0000 so that ORing doesn't change the address values during the read command sequence. Also, please make sure that the read operation is either a /OE toggle read or a /CE toggle read. The Address toggle read doesn't execute NV commands in the nvSRAM.

   

Thanks,

   

Shivendra

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