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1. Is the XENSIV^TM PAS CO2 sensor affected by acoustic and vibration noise?
   XENSIV^TM PAS CO₂ sensor has a robust packaging, and is acoustically isolated from the surrounding noise. The sensor has been designed in such a way that only CO₂ molecules can diffuse within the measurement chamber, while significantly attenuating the surrounding noise. As shown in Figure 1, the sensor performance remains within the specifications up to 101 dB SPL for pink noise, which is one of the most common signals in biological systems and is widely present in modern-day music.
   Figure 1. Acoustic robustness of XENSIV^TM PAS CO₂
   
   

   Infineon recommends that you isolate the sensor from vibration sources. The operating frequency of the sensor is 40 Hz. If vibration is expected at exactly 40 Hz with very high acceleration (≤ 0.3 g), you should do the following to minimize the vibration impact:

   • Mount the sensor in the X-direction of vibration.
   • Enable the denoiser filter.
   • Operate the sensor in continuous mode.

However, for a typical application, the impact of vibration is minimal. As shown in Figure 2, for a test setup with three sensors mounted on a commercially available air purifier, the test result shows that with the denoiser filter enabled, the sensor is robust against the vibration generated by a different fan of the air purifier.

 Figure 2. Vibration robustness of XENSIV^TM PAS CO₂

For more details, visit the CO₂ sensor website and see the application note, General design in guidelines for XENSIV™ PAS CO2 sensor.

2. How much indoor area can be covered by one sensor for a typical application?
   Even though CO₂ is generated locally, after a certain period, the CO₂ concentration is distributed throughout the room. Therefore, irrespective of the room size and number of people, the sensor is capable of accurately estimating the indoor CO₂ concentration within an indoor environment. For more details, see the application note, General design in guidelines for XENSIV™ PAS CO2 sensor.
   
   
3. Are scientific literature available indicating the harmful effects of CO₂ for human body?
   Several studies have been done on the effect of CO₂ on the human body at various concentration levels. The summary is provided in the chart. See Source [1] for the details of the study.
   
   

   Figure 3. Impact of CO₂ on the human body at various concentration levels

   Source
   

   1. https://www.sciencedirect.com/science/article/pii/S0160412018312807
   2. https://books.google.de/books?hl=en&lr=&id=TEnO6lILSj4C&oi=fnd&pg=PR8&dq=Co2+sensors+and+health&ots=Xy1umDNsmq&sig=ZjljEpPMeRBse75NgUiwbh01KuM&redir_esc=y#v=onepage&q=Co2%20sensors%20and%20health&f=false
   3. https://ieeexplore.ieee.org/abstract/document/8767280

4. Is it possible to obtain MEMS separately from the module along with the compensation software to integrate them into a custom DSP solution?
   No, currently it is not possible to purchase MEMS separately.
   
   
5. How is the sensor calibrated? Does it need recalibration after delivery?
   Each sensor is calibrated in the factory when it is shipped from Infineon. For the final product, you  will not have to perform calibration. However, you should use the automatic baseline offset correction (ABOC) feature during operation to minimize errors due to aging. See the application note, FCS_ABOC_XENSIV™ PASCO2.
   
   
6. How can I generate a known level of CO₂ in ppm?
   CO₂ sources are numerous such as bike tire CO₂ inflators, soda water, and human breath. To arrive at a known level, capture the CO₂ gas in a Tedlar bag and pump it into a gas chamber using a 6-V diaphragm pump. CO₂ concentration can easily reach more than 10000 ppm in such a setup. A reference CO₂ sensor can be used to measure the known level. See the application note, Recommended performance evaluation methodology for XENSIV™ PAS CO2 sensor.
   
   

   One such setup is as follows:
   

7. Can the XENSIV^TM PAS CO₂ sensors be battery-powered?
   XENSIV^TM PAS CO₂ can be used for battery-powered applications. Infineon has a reference design which can help operate the sensor at 3.3 V (a low-cost boost converter circuitry along with the sensor). For details, see the application note,

   XENSIV™ PAS CO2 for low-power application.

8. When is the CO₂ sensor available? Where can I get eval kits?
   

    

   Evaluation kits are already available with major distributors.

9. What are the power requirements of the XENSIV^TM PAS CO₂ sensor?
   The average power consumption to power up the sensor is 29.7 mW. During the measurement phase, the power consumption is 26.4 mW. Infineon provides a power calculator based on Microsoft Excel that helps in determining the average power consumption based on the end application.
   

   Figure 4. Average power consumption

   For more information, see Section 3 of the application note, XENSIV™ PAS CO2 for low-power applications.

10. What is the long-term stability of these sensors?
    

     With the automatic baseline offset correction (ABOC) feature enabled, the sensor accuracy drifts by 1% every year.

    

    Figure 5. Values of pressure and acoustic stability

    See Section 4.1.5 - Transfer function table in the datasheet.

11. How can I reduce a high CO₂ level?
    According to ASHRAE, an ideal living room should not have more than 1100 ppm of CO₂. Therefore, as soon as the CO₂ level increases beyond 1100 ppm, you should ventilate the room.
    
    
12. How is the sensor calibration done?
    
    • Does the sensor calibrate single gas or more gases?
    • How long does the calibration process take?
    • What is the required equipment?
    • How often calibration must be done?
    • Can the calibration be done anywhere or only in the laboratory?
    • Does the sensor have automatic calibration or auto leveling?

Each sensor is calibrated during our production for the complete operating range. Production calibration is done with highly accurate CO₂ gas bottle and verified with an ideal reference sensor.

The sensor might show small amount of offset after assembly due to stress generated from the assembly process on the light source. Therefore, to get the best performance, this offset should be corrected using either FCS or ABOC.

For the FCS calibration, you need to have a reference sensor. In the ABOC mechanism, the device keeps track of the minimum value recorded over a week. The offset to the reference baseline is computed and used to calculate the correction factor to be applied for the week after.

Figure 6. Operation of the ABOC feature

See the application note, After-assembly calibration scheme for XENSIV™ PAS CO2 for more details.

13. Can this device be installed on a microcontroller/system-on-chip such as Arduino/Raspberry Pi?
    Yes. Infineon provides C/C++ libraries for interfacing the sensor.
    See the following GitHub repos:
    
    • For devices compatible with Arduino.
    • For PSoC™ 6 MCU library.

14. Does the response time (T63 = 75s) meet the certification requirements and accuracy for medical applications?
    The sensor is not specifically designed to cover medical applications. However, the response time is defined based on the diffusion process.
15. What are the design rules for integrating the CO₂ sensor into a package for airflow speed and direction?The device must be positioned in such a way that the diffusion of CO₂ molecules can happen easily, with a large enough opening. The recommended opening is at least 14 mm x 14 mm.
    

     

    Figure 7. Airflow direction

 See the application note, General design in guidelines for XENSIV™ PAS CO2 sensor for details.

16. What is the time constant (CO₂) of the sensor?
    Time constant/response time of the sensor is the time it takes to measure the CO₂ concentration. This is due to the diffusion time of CO₂ molecules.
    For VDD3.3 = 3.3 V, VDD12 = 12 V, Tamb = 25°C, % RH = 30 %, p = 1013 hPa, the response time, T63 = 75 seconds.
    See Section 4.1.5 of the datasheet for more information.
    
    
17. What are the response times in different airflows?
    The response time is independent of the airflow. You should not place the sensor directly within the airflow. For more details, see the application note, General design in guidelines for XENSIV™ PAS CO2 sensor.
    
    
18. How do I waterproof the sensor board for wet environments?
    The sensor is not designed for applications where it must be waterproofed. The sensor may be damaged if submerged in water.
    
    
19. Is the CO₂ sensor tested in an environmental chamber?
    A test chamber is used, which  ensures that there is no leakage, and it can maintain laminar flow while exposing the sensor to the target gas concentration. Inside the test chamber, you should accommodate a reference CO2 sensor. Additionally, to get an overview of the complete test conditions, the pressure sensor, humidity sensor, and temperature sensor should also be considered.
    For more information, see the application note, Recommended performance evaluation methodology for XENSIV™ PAS CO2 sensor.
    
    
20. Can the sensor be used within battery-driven consumer goods, with a supply voltage lower than 12V, such as 3.3 V?
    Infineon has addressed the requirement; a reference design is available to ease the design process. You can use this design to realize 12V with relatively low effort. For more information, see the application note, Reference design Sensor2Go kit, and the detailed knowledge base article (KBA).
    
    
21. What are the major technologies used in the sensor?
    The sensor uses a microphone, emitter (MEMS + filter), and the embedded software that implements the sensing algorithm

Note: For more information, see the Community webpage for CO2 sensor where you can find answers to your questions and ask your own.

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V_LKO is the lock-out voltage of the core power supply (V_CC). The intention of V_LKO is to make sure that device is on expected V_CC level before program/erase to avoid unintentional program/erase operation during V_CC power-up and down transitions. When V_CC is below V_LKO, the entire flash memory array is protected against a program or erase operation. This ensures that no spurious alteration of the memory content can occur during power transition.
V_LKO is a single-value threshold parameter; every device has a different V_LKO. Min/Max is an estimated range of V_LKO. All the devices have V_LKO within this range.

During power-down or when V_CC drops below V_LKO, the V_CC and V_IO voltages must drop below the V_CC Reset (V_RST) minimum for a period of t_PD for the part to initialize correctly when V_CC and V_IO again rise to their operating ranges. See Figure 1.
In system implementation, you should use the maximum value for V_LKO in all devices. For example, monitor V_CC; if it drops below V_LKO(max), make sure that V_CC and V_IO voltages drop below the V_CC Reset (V_RST) minimum for a period of t_PD so that the device is correctly initialized.

Figure 1 Power down and voltage drop

Figure 1 shows the power down and voltage drop diagram and VLKO. See Figure 10 in S29GL01G/512T datasheet Rev.L.
This diagram applies to all Infineon GL series Parallel NOR flash families.

Version: **

Wait states and dummy cycles are the same. Read latency is superset of wait states (or dummy cycles). Read latency equals the sum of clocks for mode bits and wait states. 

To understand the concepts, here are the definitions from JESD216 standard:

• Mode bits: Optional control bits that follow the address bits and are driven by the controller if they are specified.
• Wait states: Required clock cycles between the address bits or optional mode bits and the start of data when reading from the flash device. Some device data sheets describe these as dummy cycles because no information is transferred between the controller and memory during these cycles. Neither controller nor memory are required to drive the data lines during these cycles.
• Read latency: On flash read instructions, the total number of clocks between the end of address and the start of data. The sum of clocks for mode bits and clocks for wait states equals the read latency.
  Read latency equals dummy cycles (wait states) when mode bits are not specified by controller; see Figure 1. Read latency equals the sum of clocks for mode bits and dummy cycles (wait states) when mode bits are specified by controller; see Figure 2.

Figure 1 Read latency without mode bits

Figure 2 Read latency with mode bits

Version: **

Question: Can noise on the power supply rail cause a ‘bit-flip’, and damage on the S29AL-J, S29PL-J, and S29JL-J flash memory devices?

Answer: Bit flip may be a possible cause of a marginally programmed bit, also known as 'soft-programmed cell'. The presence of system noise or transients on the power supply rail during the programming operation can lead to 'under-programming' or ‘uncharged cell.’ High noise levels may disrupt or limit the programming threshold voltage (Vt) from reaching the required levels to fully program a cell. Although excessive noise may be present on the power supply rail, it is important to note that no permanent damage will occur. 

When a ‘READ’ operation is performed, a marginally programmed bit can be read as '0' (programmed) or a '1' (erased). If read as a ‘0’ or a ‘1’ (respectively) passing the verification testing, the flash device becomes a probable candidate for a later pseudo single bit charge loss (pSBCL) failure. 

A pSBCL cell is a physically good memory cell which had only been marginally programmed or erased. The cell has no physical anomalies and does not exhibit electron leakage from the floating gate with voltage or high-temperature stress. The subject cell has good data retention which is equal to a good bit. pSBCL is not a device-related failure but an application-induced failure, i.e., system noise or transients that are present on the power supply rail. Therefore, no such damage to the cell will occur.

To recover from a pSBCL failure, you should initiate a Chip Erase operation, or at the very least, a Sector Erase of the sector(s) of where the pSBCL occurred, and then re-program the data. This will ensure that the programming threshold voltage (Vt) has reached the required voltage levels to fully program the cell(s).

For more details, see the following documents:

• S29AL016J datasheet
• S29AL008J datasheet
• S29PL-J datasheet
• S29JL064J datasheet
• S29JL032J datasheet
• S29CL_CDJ datasheet
• S25FL-L datasheet
• S25FL064L datasheet

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Consider the following table to calculate the dimensions for SMD and NSMD pad types when designing hardware with BGA package FAB024 for optimum board-level reliability. See Figure 1.

Note: These values depend on the designer’s decision on the solder ball diameter size when processing; note that these are only recommendations. Take into account the BGA pad pitch to make sure that the solder balls are clearly apart from each other to prevent short circuits.

Figure 1

Two types of land pad patterns are solder mask defined (SMD) pad and non-solder mask defined (NSMD) pad. The land pad pattern type differs depending on the solder mask opening.

Consider the following table to select a PCB land pad pattern type when designing hardware with BGA package FAB024. See Figure 1.

Figure 1

Version: **

1. RFU (Reserved For Future Use)

No device internal signal is currently connected to the package. However, there is potential future use of the connector.

 1.1 Recommended use:

• Do not use RFU connectors for PCB routing channels so that the PCB may take advantage of future enhanced features in devices with a compatible footprint.

2. DNU (Do Not Use)

This pin may have internal signal connected to the package connector. The connection may be used by Infineon for test or other purposes, and is not intended for connection to any host system signal. Any DNU signal-related function will be inactive when the signal is at V_IL. The signal has an internal pull-down resistor.

 2.1 Recommended use:

• Maybe left unconnected in the host system.
• Maybe tied to VSS.
• Do not use these connections for PCB signal routing channels.
• Do not connect any host system signal to these connections.

3. NC (Not Connected)

This pin does not have any internal signal connected to the package connector. There is no future plan to use the connector for a signal.

 3.1 Recommended use:

• The connection may safely be used for routing space for a signal on a PCB. However, any signal connected to an NC pin must not have voltage levels higher than V_IO.

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S28HL-T and S28HS-T series SEMPER™ NOR flash with Octal interface can support legacy SPI (x1) mode and Octal (x8) mode, with legacy SPI as the default. The two modes can be switched from one to the other as necessary. It requires some configurations and special notices on both the host controller and the flash device.

Switch from legacy SPI (x1) mode to Octal (x8) SDR mode:

1. The host controller in legacy SPI (x1) mode communicates with the flash through the legacy SPI (1S-1S-1S) protocol to access and set CFR5V/N[1:0] = 01b.
2. The host controller switches the work mode from legacy SPI to Octal (8S-8S-8S). The host controller is now in Octal (x8) SDR mode.
3. Now, the host controller can communicate with the flash in Octal (8S-8S-8S) protocol. Depending on whether the register write was to the volatile or non-volatile register, the following will happen:
   1. If CFR5V[1:0] = 01b, the flash will revert to legacy SPI mode after POR/reset.
   2. If CFR5N [1:0] = 01b, the flash will keep Octal SDR mode for further boots.

Switch from legacy SPI (x1) mode to Octal (x8) DDR mode:

1. The host controller in legacy SPI (x1) mode communicates with the flash through the legacy SPI (1S-1S-1S) protocol to access and set CFR5V/N[1:0] = 11b.
2. The host controller switches the work mode from legacy SPI to Octal (8D-8D-8D). The host controller is now in Octal (x8) DDR mode.
3. Now, the host controller can communicate with the flash in Octal (8D-8D-8D) protocol. Depending on whether the register write was to the volatile or non-volatile register, the following will happen:
   1. If CFR5V[1:0] = 11b, the flash will revert to legacy SPI mode after POR/reset.
   2. If CFR5N [1:0] = 11b, the flash will keep Octal DDR mode for further boots.

Switch from Octal (x8) mode to legacy SPI (x1) mode:

1. The host controller in Octal (x8) mode communicates with the flash through the Octal (8S-8S-8S or 8D-8D-8D) protocol to access and set CFR5V/N[1:0] = 00b.
2. The host controller switches the work mode from Octal (x8) to legacy SPI. The host controller is now in legacy SPI (x1) mode.
3. Now, the host controller can communicate with the flash in legacy SPI (1S-1S-1S) protocol. To set the chip in legacy SPI mode by default, access and set the non-volatile version register CFR5N[1:0] = 00b.

Version: **

Question: Please provide a list of the Infineon NOR Flash replacement parts.

Answer: This article contains a list of Infineon NOR Flash memory families which can be used as a replacement for older/obsoleted Infineon NOR Flash Memory families. It also contains the links for the available migration guide application notes. For those replacements where a migration guide is not available, this table provides some comments highlighting the key differences between the two device families.

For more detailed information related to AC/DC characteristics, command summary etc., refer to the device datasheets. Visit our web page to know more about Infineon NOR Flash memory.

For cross reference search, use the search tool present here.

Version: **

Sectors are the erase units of a flash memory. Infineon serial NOR flash devices offer a flexible sector architecture with two options:

• Uniform sector: The entire flash array is divided into equally sized uniform sectors
• Hybrid sector size: Physical set of 4-KB sectors present at the top or bottom of the address space

Whether a device supports hybrid sector architecture or not can be determined through the model number in the ordering part number (OPN) of the device or the configuration register settings. See the respective device datasheet for detailed OPN definition including model number information.

Configuration register settings can be modified to change the default sector architecture. For example, in the FS-S device family, one particular bit of the configuration register (CR3NV [3]) enables or disables the 4-KB parameter sectors. The default state of CR3NV[3] bit is 0, which means 4-KB sectors are enabled. The configuration register can be programmed to set the CR3NV[3] bit to 1 to disable 4-KB parameter sector overlay and choose the uniform sector size option. The CR3NV[3] bit is an OTP (one time programmable) bit, which means it can be programmed only once in the entire lifecycle of the flash memory.

4-KB parameter sectors can be at the bottom or top of the flash device. Their location can be changed by modifying the TBPARM bit of the configuration register. TBPARM is also an OTP bit. For example, the default value of the TBPARM bit is 0, indicating that the 4-KB physical sectors are located at the bottom (low address). Programming the configuration register to set TBPARM bit to ‘1’ will change the location of the parameter sectors to top (high address) space.

There are special commands to perform sector erase operation on these 4-KB parameter sectors. The P4E (20h) and the 4P4E (21h) commands can be used to erase parameter sectors. The P4E command can take 3-byte as well as 4-bytes address, whereas the 4P4E command always expects 4-bytes address. The P4E and 4P4E commands are ignored when the device is configured for uniform sector size option.

Examples:
Sector organization in FL-S and FS-S devices –

• S25FL128S/S25FL256S
  • Uniform sector: The entire flash is divided into uniform 256-KB sectors
  • Hybrid sector size: Physical set of thirty-two 4-KB sectors present at the top or bottom of the address space; all remaining sectors of 64-KB size.
• S25FS512S
  • Uniform sector: The entire flash is divided into uniform 256-KB sectors
  • Hybrid sector size: Physical set of eight 4-KB sectors and one 224-KB sector present at the top or bottom of the address space; all remaining sectors are of 256-KB size.

In FL-S device, the 64-KB sector erase command (D8h or DCh) can also be used to erase a group of sixteen 4-KB parameter sectors. The advanced sector protection feature provides a PPB and a DYB protection bit for each of these thirty-two 4-KB parameter sectors. If the 64-KB sector erase command is applied to a certain 64-KB range such that it includes a protected 4-KB sector, the erase operation will not be executed on the protected range of memory and the E_ERR bit in the status register will be set.

On the other hand, in the FS-S family, only the parameter sector erase commands (20h or 21h) must be used to erase 4-KB sectors individually. The uniform sector erase command (D8h or DCh) should be used to erase all remaining sectors (224-KB sector and 256-KB sectors). The same conditions are applicable for 128Mb/256Mb FS-S device parameter sector and uniform sectors (32-KB sector and 64-KB sectors) as well.