Author: HongyanW_86 Version: **
The J-Link driver V6.48a or later version has added support for Traveo II devices. With the updated J-Link driver, Traveo II programming in J-Flash and debugging in IAR Embedded Workbench or Ozone J-Link debugger software work as expected for both CM0+ and CM4 core.
1. Debug Traveo II in IAR Embedded Workbench
Currently there is an issue in IAR Embedded Workbench if you try to debug both CM0+ and CM4 projects at the same time.
2. Multi-core debug Traveo II in Ozone
Version: *B
Version: **
In FX3 SDK 1.3.4, if the DMA channel associated with a USB socket is created before setting up the USB connection using the CyU3PConnectState () API, USB transfers may not occur even after successfully committing the data to the USB socket (CyU3PDmaChannelCommitBuffer () or CyU3PDmaMultiChannelCommitBuffer () API returns CY_U3P_SUCCESS). An example scenario is shown in Figure 1 and Figure 2.
Figure 1. UART Debug Prints showing DMA buffers committed to USB Socket
Figure 2. USB IN Transfer fails from USB Control Center
Notes:
This problem can be due to the known issue listed in the FX3 SDK Release Notes, which mentions that the settings for the DMA channels associated with USB sockets may be invalidated during the USB device mode connection startup.
To avoid this problem, you must reset the DMA channel using CyU3PDmaChannelReset () or CyU3PDma-MultiChannelReset () API and re-enable after each enumeration cycle. This can be done when the CY_U3P_USB_EVENT_SETCONF event occurs, indicating that the USB device has enumerated successfully. You should not use the DMA channel associated with the USB socket before the CY_U3P_USB_EVENT_SETCONF event.
Version: **
Question: What are the common errors encountered while programming CCG3PA using the EZ-PD Configuration Utlity?
Answer: The EZ-PD Configuration Utility is a Microsoft Windows application that helps users to configure and program the CCGx Controllers. The Graphical User Interface (GUI) allows users to intuitively select and configure different parameters for their application.
For more details on the EZ-PD Configuration Utility and installer, please visit https://www.cypress.com/documentation/software-and-drivers/ez-pd-configuration-utility
Programming setup in CY4532 EZ-PD CCG3PA EVK
The CY4532 EZ-PD CCG3PA EVK consists of a main board with a CCG3PA controller and a power board, which provides required power supplies to the main board. The power board also consists of a Cypress CCG4 controller, which enables downloading firmware on to the CCG3PA present on the main board using the EZ-PD Configuration Utility. It is connected to the CCG3PA device using CC lines. The CCG4 controller is connected to a Cypress USB-Serial device (present on the power board) over I2C to receive the CCG3PA firmware from the EZ-PD Configuration Utility. The connection required to program the CCG3PA controller on the CY4532 EVK is shown in Figure 1.
Figure 1. CCG3PA Controller Programming Setup on CY4532 EVK
Common errors during Programming
The following are some common errors encountered by users while programming CCG3PA using the EZ-PD Configuration Utility, their possible reasons, and solutions.
1. EZ-PD Configuration Utility cannot detect the device. The power board of CY4532 EVK is detected by the EZ-PD Configuration Utility but the device to be programmed (main board) is not detected.
Figure 2. Main Board not Detected in EZ-PD Configuration Utility
Table 1. Solution for Error in Detection of Main Board while Programming
Problem/ Error | Reason/ Justification | Solution |
EZ-PD Configuration Utility cannot detect the device. Power board is detected by the Configuration Utility but device to be programmed is not detected. |
The power board and the main board to be programmed are not properly connected/powered | Make sure that the connection between the device and the power board is valid and the power board is properly powered. |
Invalid jumper settings in CY4532 EVK | Make sure that the jumpers are connected as described in the CY4532 EVK Guide |
2. Device to be programmed (main board) is greyed out and cannot be selected in EZ-PD Configuration Utility during firmware update.
Figure 3. CCG3PA Controller on the Main Board is Greyed out in EZ-PD Configuration Utility
Configuration Utility log:
PD contract established.
Error: No response to GET_SILICON_ID U_VDM
Retrying, ignore the above error message
Error: Flashing VID (4b4) not found in Discover SVID Response
Table 2. Solution for Error of Device being deactivated while Programming
Problem/ Error |
Reason/ Justification |
Solution |
Device to be programmed is greyed out and cannot be selected in EZ-PD Configuration Utility during firmware update.
|
Firmware update over CC interface was disabled in configuration table by setting “Enable firmware update” under Device Parameters tab to “No” |
“Enable firmware update” section in the configuration table must be set to “Yes”. This new firmware must be programmed using the CCG3PA SWD interface. This enables further firmware updates to be performed over CC interface from the EZ-PD Configuration Utility. |
3. Firmware update fails at 30% completion with “Failed to find valid firmware for update” error in EZ-PD Configuration Utility log.
Figure 4. Firmware Update Failure in EZ-PD Configuration Utility
Table 3. Solution for Firmware Update Failure
Problem/ Error |
Reason/ Justification |
Solution |
Firmware update stops at 30% completion with Failed to find valid firmware for update error in EZ-PD Configuration Utility log. |
Occurs when .cyacd file of configuration table is used to update the entire firmware. |
When a PSoC Creator project is built, two separate .cyacd files are created: Project_name.cyacd contains the entire firmware image to be programmed and Project_name_config.cyacd contains only the configuration table of the project. Make sure to select Project_name.cyacd while programming the new firmware and Project_name_config.cyacd while updating the configuration table. |
4. Flash update procedure fails. PD contract not established after RESET.
Table 4. Solutions for Flash Update Error
Problem/ Error | Reason/ Justification | Solution |
Firmware update stops at 90% / 99% completion when the flash update procedure fails. PD contract could not be established after the RESET error message. | PD contract not established after FW update. New firmware programmed may not be functional in which case future firmware updates over CC interface are not possible. | A tested working firmware with bootloader should be programmed over SWD interface. Upon reprogramming the device can again be programmed using EZ-PD Configuration Utility. |
Device is being programmed with future firmware update disabled in the configuration table by setting “Enable firmware update” parameter to “No”. | In this case, it is the expected behaviour. Test if the newly programmed firmware is working as expected. | |
In the CY4532 EVK, this occurs if the new firmware is from a different application (Power Bank/ Power Adapter) than the previous one. | It is the expected behaviour; change the jumper settings per the newly programmed application and test if it is working. | |
PD Contract not established after FW update. Smaller value of UFP restart timeout could cause the issue. |
UFP restart timeout value can be increased in the Options menu. |
5. Updated firmware image not valid. Flash update procedure failed.
Figure 5. Error Message Displayed when Programmed with Corrupted Firmware
Table 5. Solutions for Error due to Flash Update Procedure Failure
Problem/ Error |
Reason/ Justification |
Solution |
Updated firmware image not valid. Flash update procedure failed. |
Firmware file used is corrupted. Error message is displayed as in Figure 5. |
A working firmware without corrupted data should be programmed over the SWD interface. |
Author: ShusakuS_56 Version: **
Question:
I want to know the execution time of some software. Is there a method to measure the execution time without using a debugger?
Answer:
You can measure the approximate software execution time using the hardware timer (TCPWM). Here is the code snippet for "Hello World".
Code 1. Original “Hello World”
#include <stdio.h> int main() { printf("Hello World"); return 0; } |
To measure software execution time, make the following modifications to the “Hello World” code:
1. Add the TCPWM timer start command and the TCPWM timer stop command before and after printf ("Hello World"); to the ”.
Code 2. Adding TCPWM Timer Start and Timer Stop Commands
#include <stdio.h> int main() { // Initialize Clock Divider and TCPWM (For more details, please see Technical Reference Manual) : // If you need, please Enter Critical section to avoid any interrupt during measurement. uint32_t saveIntrEnabled = Cy_SysLib_EnterCriticalSection(); // Interrupt Disable & Save Current Status : // Timer Stop/Clear/Start (Please use INLINE function to reduce software offset like below) TCPWM0_GRPx_CNTx_COUNTER->unTR_CMD.stcField.u1STOP = 0x01; // Timer Stop Command (If Timer is Starting) TCPWM0_GRPx_CNTx_COUNTER->unCOUNTER.u32Register = 0UL; // Timer Counter Clear Command TCPWM0_GRPx_CNTx_COUNTER->unTR_CMD.stcField.u1START = 0x01; // Timer Start Command printf("Hello World"); // Timer Stop (Please use INLINE function to reduce software offset like below) TCPWM0_GRPx_CNTx_COUNTER->unTR_CMD.stcField.u1STOP = 0x01; // Timer Stop Command // Read and Save the counter value uint32_t TimerCount = Cy_Tcpwm_Counter_GetCounter(TCPWM0_GRPx_CNTx_COUNTER); : // If you need, restore interrupt status Cy_SysLib_ExitCriticalSection(saveIntrEnabled); // Interrupt Restore Previous Status return 0; } |
2. Then, add a command to read the timer value of the corresponding TCPWM. This timer value counts the number of clocks. Therefore, the software execution time can be calculated as:
[Example] Clock Frequency = 20 MHz, Value of TimerCount = 0xF000 (0d61440)
To make the measurement time more accurate, take the following measures.
#include <stdio.h> int main() { : // Timer Stop/Clear/Start (Please use INLINE function to reduce software offset like below) TCPWM0_GRPx_CNTx_COUNTER->unTR_CMD.stcField.u1STOP = 0x01; // Timer Stop Command (If Timer is Starting) TCPWM0_GRPx_CNTx_COUNTER->unCOUNTER.u32Register = 0UL; // Timer Counter Clear Command TCPWM0_GRPx_CNTx_COUNTER->unTR_CMD.stcField.u1START = 0x01; // Timer Start Command printf("Hello World"); // Timer Stop (Please use INLINE function to reduce software offset like below) TCPWM0_GRPx_CNTx_COUNTER->unTR_CMD.stcField.u1STOP = 0x01; // Timer Stop Command // Read and Save the counter value uint32_t TimerCount = Cy_Tcpwm_Counter_GetCounter(TCPWM0_GRPx_CNTx_COUNTER); : // Measure the time from starting the counter to stopping TCPWM0_GRPx_CNTx_COUNTER->unCOUNTER.u32Register = 0UL; // Timer Counter Clear Command TCPWM0_GRPx_CNTx_COUNTER->unTR_CMD.stcField.u1START = 0x01; // Timer Start Command TCPWM0_GRPx_CNTx_COUNTER->unTR_CMD.stcField.u1STOP = 0x01; // Timer Stop Command uint32_t SwOffsetCount = Cy_Tcpwm_Counter_GetCounter(TCPWM0_GRPx_CNTx_COUNTER); uint32_t TimerCountDuringHelloWorld = TimerCount – SwOffsetCount; return 0; } |
Note: This KBA applies to the following series of Traveo II MCUs:
Show Less
Author: ShusakuS_56 Version: **
Question:
Why doesn't the counter start when I enable the counter in TCPWM?
Answer:
If the counter does not start, make sure that the following are set correctly:
(1) CLK Setting
(2) Hardware control signals
(1) CLK Setting
TCPWM has a system clock and a counter clock.
The system clock is supplied from CLK_PERI via a divider. This clock is used for trigger synchronization.
The counter clock is supplied from CLK_PERI via Peripheral Clock Dividers. This clock is used for counter control. You should set the clock for each counter.
The number of these clocks differs for the CYT2B/CYT4B/CYT4D series. For more details, see the "Clock Diagram" section in the corresponding datasheet.
(2) Hardware control signals
Even if the counter is enabled, the counter does not start unless the counter's hardware control signals (Reload, Start, Stop, Count, Capture0, Capture1) are enabled. The counter's hardware control signals must be selected from the following Trigger Input signal using the “TCPWMx_GRPy_CNTz_TR_IN_SEL0” and “TCPWMx_GRPy_CNTz_TR_IN_SEL1” register.
- Fixed at ‘0’ or ‘1’
- Connect signals from the output of other peripherals or external terminals via the Trigger Multiplexer block.
[Example]
In timer mode, hardware control signals are used as follows:
- Reload : Active "H". Initializes and starts the counter.
When "H" is supplied, the counter starts from the initial value (Up mode: 0, Down mode: period).
If neither Reload nor Start is supplied, the counter will not start.
- Start : Active "H". Starts the counter.
When "H" is supplied, the counter starts from the current counter value.
If neither Reload nor Start is supplied, the counter will not start.
- Stop : Active "H". Stops the counter.
When "H" is supplied, the counter does not start.
- Count : Active "H". Count event increments/decrements the counter.
When "L" is supplied, the counter does not start.
- Capture0 : Not used.
- Capture1 : Not used.
These signals can also be generated by with the TCPWMx_GRPy_CNTz_TR_CMD register.
For more details, see the "Timer, Counter, and PWM" section in the corresponding Technical Reference Manual.
Note: This KBA applies to the following series of Traveo II MCUs:
TCPWM Interrupt Does Not Occur in Traveo II Fam... | Cypress Developer Community
Show LessAuthor: ShusakuS_56 Version: **
Question:
I am generating an interrupt to the CPU with the TCPWM Counter Overflow (OV) event. However, when the reload signal is input to the counter, no interrupt occurs. How do I generate an interrupt when a reload signal is input to the counter?
Answer:
When a reload signal is input to the TCPWM counter, overflow of the counter occurs, but no TC event occurs. This is as specified.
If you want to generate an interrupt even when a reload signal is input to the counter, use a compare match to generate an interrupt.
For example, set the compare value to "0" in the "TCPWMx_GRPy_CNTz_CC0" register and enable CC0_MATCH in the “TCPWMx_GRPy_CNTz_INTR” register. When the counter is set to "0" by the reload signal, it matches the compare value. Therefore, a compare match interrupt is generated as shown below. ('x' signifies the TCPWM instance number, 'y' is the group number and 'z' is the counter in the respective TCPWM group.)
Note that Interrupts are counter mode specific and can be generated for a Terminal Count (TC) or Compare/Capture0/1 (CC0/1) event.
For more details, see the "Timer, Counter, and PWM" section in the corresponding the Technical Reference Manual:
Note: This KBA applies to the following series of Traveo II MCUs:
Author: ShusakuS_56 Version: **
Question:
In Traveo™ family, if a new A/D conversion is started before the previous A/D conversion result is read, the next conversion will start; however, the result will not be saved. Can this feature be used in Traveo II Family?
Answer:
No. This feature is different for Traveo and Traveo II. In Traveo II, new results are overwritten.
For more details, see the "SAR ADC" section in the corresponding the Architecture Technical Reference Manual:
Note: This knowledge base article applies to the following series of Traveo II MCUs:
Author: ShusakuS_56 Version: **
Question:
Can the Arm® Cortex®-M4/M7 and Cortex-M0+ cores in Traveo™ II family be debugged from the same JTAG?
Answer:
Yes. Both cores can be debugged from the same JTAG. For details of the debugger, contact the following third parties:
Note: This KBA applies to the following series of Traveo II MCUs:
Author: ShusakuS_56 Version: **
Question:
Traveo™ II has a Cortex-M0+ core in addition to the Cortex-M4/M7 core. To reduce the load on the Cortex-M4/M7 core, I want the Cortex-M0+ core to process some of the load. Is that possible?
Answer:
Yes. It is possible. However, the Cortex-M0+ core is basically used for security processing. Please verify the security processing on your system.
Note: This KBA applies to the following series of Traveo II MCUs:
- CYT2B Series
- CYT4B Series
- CYT4D Series
Show Less