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I am generating an interrupt to the CPU with the TCPWM Counter Overflow (OV) event. However, when the reload signal is input to the counter, no interrupt occurs. How do I generate an interrupt when a reload signal is input to the counter?
When a reload signal is input to the TCPWM counter, overflow of the counter occurs, but no TC event occurs. This is as specified.
If you want to generate an interrupt even when a reload signal is input to the counter, use a compare match to generate an interrupt.
For example, set the compare value to "0" in the "TCPWMx_GRPy_CNTz_CC0" register and enable CC0_MATCH in the “TCPWMx_GRPy_CNTz_INTR” register. When the counter is set to "0" by the reload signal, it matches the compare value. Therefore, a compare match interrupt is generated as shown below. ('x' signifies the TCPWM instance number, 'y' is the group number and 'z' is the counter in the respective TCPWM group.)
Note that Interrupts are counter mode specific and can be generated for a Terminal Count (TC) or Compare/Capture0/1 (CC0/1) event.
For more details, see the "Timer, Counter, and PWM" section in the corresponding the Technical Reference Manual:
Note: This KBA applies to the following series of Traveo II MCUs: