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The SWD interface in PSoC® 3 and PSoC 5LP uses two pins for programming/debug. Either one of the pairs of pins below can be used as SWD pins.
JTAG pins as SWD pins: TMS (P1) as SWDIO, TCK (P1) as SWDCK
USB pins as SWD pins: USB D+ (P15) as SWDIO, USB D- (P15) as SWDCK
The USBIO pins are useful for in-system programming of USB solutions that would otherwise require a separate programming connector. One pin is used for the data clock (SWDCK), and the other is used for data input and output (SWDIO). SWD can be enabled on only one of the pin pairs at a time. No setting needs to be made in PSoC Creator™ for this. Once the device comes out of reset, the Test Controller block in PSoC monitors for SWD clock transitions on both of the SWDCK port pins (TCK, USB D-). It will select the SWD pair on which it detects a clock transition and use that pair of pins for further programming and debug operations.
The target device can be powered externally or by the MiniProg3 itself. When the target device needs to be powered by the MiniProg3, the VTARG pin of MiniProg3 should be connected to the appropriate power supply pins (VDDIOx, VDDA, VDDD). The maximum current sourcing capability of the MiniProg3 is limited to approximately 200 mA. When the target device is powered externally, the MiniProg3 needs to know the voltage levels at which the I/O pins should be driven. In this case, as the USB pins are used for SWD programming, the VDDD supply voltage must be connected to the VTARG pin of the MiniProg3 connector because the USB pins are powered by the VDDD pin. This is shown in Figure 1.
Figure 1. Using USB Pins for SWD Interface for PSoC 5 LP