Version: **
Question: Why do PSoC 5 LP projects exported to the IAR toolchain warn of verification failures during programming?
Answer: The program files that the IAR toolchain is attempting to program use a virtual address for the EEPROM and ECC memory ranges. The IAR debugger sends data from the EEPROM and ECC memory ranges, and the PSoC 5 LP flash loader translates the memory ranges to their absolute addresses. When the IAR debugger attempts to read the EEPROM and ECC memories for verification, it uses the virtual addresses, resulting in data mismatches.
You can verify that the programming was successful by using PSoC Programmer™ to read the device, or you can look at the actual address of the EEPROM and ECC memories in the IAR debugger.
