Author: VasanthR_91 Version: **
Translation - Japanese: PSoC VDA/IDAC の出力電圧範囲 - KBA227543- Community Translated (JA)
Question:
Why is that the PSoC® VDAC/IDAC cannot be used in the entire operating range of the device?
Answer:
The basic building block of VDAC/IDAC circuits is the current mirror circuit (see the respective device architecture TRM: PSoC 3, PSoC 4 or PSoC 5LP).
For a current mirror circuit to provide the intended current, the transistors should be in saturated mode of operation. The condition that the drain-source voltage should be greater than the difference between the gate-source voltage and the threshold voltage [V(DS) > V(GS) - V(TH)] translates into the headroom voltage (difference between the power supply voltage and the maximum voltage the output can go to) at the circuit level, thus limiting the output range of the circuit. In VDAC Component datasheets, the ‘compliance voltage’ parameter represents the headroom voltage. The output voltage is limited to VDDA - Vcompliance in the case of VDAC/IDAC.
In the case of IDAC, Vcompliance is important. You must ensrue that the output voltage (the product of the IDAC load resistance and the IDAC current range), does not exceed VDDA - Vcompliance at any point in the IDAC current range.
