Memory Protection Function in Traveo S6J3XXX Series and CY9D560 Series MCUs - KBA222267
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Dec 13, 2017
01:57 AM
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Dec 13, 2017
01:57 AM
Version: *A
Translation - Japanese: Traveo S6J3XXXシリーズおよびCY9D560シリーズMCUのメモリプロテクション機能 - KBA222267 - Community Translated (JA)
Question:
Do the Traveo™ MCUs have a protection function to prevent program execution in memory area and stack area?
Answer:
The Traveo MCUs have the memory protection unit (MPU), a function of Arm® Cortex®-R5F CPU core, which can be set to prevent program access to specified areas. The MPU can control the access to a maximum of 16 regions.
MPU can control access in the following series of Traveo MCUs:
- S6J3110
- S6J3120
- S6J3200
- S6J3300
- S6J3310
- S6J3320
- S6J3330
- S6J3340
- S6J3350
- S6J3360
- S6J3370
- S6J3400
- S6J3510
- CY9D560
Note:
The prefix MB of the product has been changed to CY. For instance, MB9D560 has been changed to CY9D560.
Labels
- Tags:
- backup ram
- flash memory
- mb9d56
- mb9d560
- memory protection
- mpu
- ram
- s6j3
- s6j3110
- s6j3120
- s6j3200
- s6j3300
- s6j3310
- s6j3320
- s6j3330
- s6j3340
- s6j3350
- s6j3360
- s6j3370
- s6j3400
- s6j3510
- traveo
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