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Load Reduction for Arm® Cortex®-M4/M7 Core in Traveo II Family – KBA228946

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Load Reduction for Arm® Cortex®-M4/M7 Core in Traveo II Family – KBA228946

Author: ShusakuS_56           Version: **

Question:

Traveo™ II has a Cortex-M0+ core in addition to the Cortex-M4/M7 core. To reduce the load on the Cortex-M4/M7 core, I want the Cortex-M0+ core to process some of the load. Is that possible?

Answer:

Yes. It is possible. However, the Cortex-M0+ core is basically used for security processing. Please verify the security processing on your system.

Note: This KBA applies to the following series of Traveo II MCUs:

- CYT2B Series

- CYT4B Series

- CYT4D Series

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Last update:
‎Dec 23, 2020 08:31 PM
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