Load Capacitance of Tri-State Data bus of many SRAMs connected together
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Sep 01, 2011
09:26 AM
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Sep 01, 2011
09:26 AM
Question: What will be the load capacitance of a Tri-State Data bus when more than one SRAM busses are connected together?
Answer:
Eventhough only one SRAM will be using the data bus at a time, it will see the load capacitance due to all other data busses from idle SRAMs.
If the pin capaticance of one SRAM's Tri-State Data bus is 15pF and if 5 busses are connected together, then the active driver will see a load of 15 x 5 = 75pF
- Tags:
- async fast srams
- async micropower (mobla) srams
- dual-port srams
- fifos
- mobl dual-ports
- nonvolatile ram
- synchronous srams
- wafer & die
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