When the GPIO is bit-banged to get a clock, the resulting frequency can be in the order of ~500 kHz.
Why is this so?
And how can the frequency be increased?
- In the FX3 architecture, a GPIO update must go through three internal buses operating in different clocks than the CPU clock. Therefore, a large delay is incurred when toggling GPIO using the CPU. Refer to the FX3 Programmer’s Manual for details.
If you know that the GPIO being toggled is a simple GPIO, avoid using CyU3PGpioSetValue because it incurs extra overhead. Use the CyU3PGpioSimpleSetValue function instead.
Alternatively, the GPIO_SIMPLE register can also be toggled directly as follows:
#define CY_U3P_LPP_GPIO_SIMPLE_ADDRESS(n) (uvint32_t*)(0xe0001100 + ((n)*(0x0004)))
#define CY_U3P_LPP_GPIO_INTR (1<<27) /* Do not touch the interrupt bit */
#define OUT_VALUE 0x01 /* The 0th bit is the value that is output on the pins */
#define FX3_GPIO_CLK 21 /* Toggle GPIO[21] */
/* Read the register and toggle the OUT_VALUE bit */
uvint32_t * gpioClockPtr = CY_U3P_LPP_GPIO_SIMPLE_ADDRESS(FX3_GPIO_CLK);
* gpioClockPtr = (*gpioClockPtr & ~CY_U3P_LPP_GPIO_INTR) ^ OUT_VALUE;
Refer to the Registers section of the EZ-USB FX3 TRM available at http://www.infineon.com/?rID=80775 for more details.
