Strictly necessary cookies are on by default and cannot be turned off. Functional, Performance and Tracking/targeting/sharing cookies can be turned on below based on your preferences (this banner will remain available for you to accept cookies). You may change your cookie settings by deleting cookies from your browser. Then this banner will appear again. You can learn more details about cookies HERE.
Strictly necessary (always on)
Functional, Performance and Tracking/targeting/sharing (default off)
The SuperSpeed USB controller FX3 CYUSB3014’s I/Os can be configured as GPIO, SPI, UART, I2C, I2S, or GPIF. Up to 61 I/O pins can be configured to function in a variety of modes; the functional mode for each of these pins (or groups of pins) should be set based on the desired system-level functionality.
Multifunction I/O can be configured as GPIO only, GPIF II-16 (16-bit or 8-bit data bus) + SPI + GPIO, GPIF II-16 + UART + GPIO, GPIF II-16 + SPI + UART + GPIO, GPIF II-16 + I2S + GPIO, GPIF II-16 + SPI + UART + I2S + GPIO, GPIF II-32+UART+I2S+GPIO, the following table shows the configured I/O matrix.
With each configuration, the power domain of I/O matrix should be attended to. For example, UART power domain is VIO3 when it is configured as GPIF II-16 bit + SPI + UART + I2S + GPIO, while the power domain is VIO4 when it is configured as GPIF II-32 bit + UART + I2S + GPIO. See Table 7 in the CYUSB301X/CYUSB201X datasheet in for details.
Among all the peripherals, GPIF II, UART, I2S, SPI, I2C, JTAG configuring the I/O matrix will match the most similar configuration. For example, both GPIF-16 bit + I2S + UART and GPIF-16 bit + I2S + SPI configurations will match the GPIF-16 bit + UART + I2S + SPI I/O Matrix.
Note: SPI interface lines are not available when GPIF II is configured in 32-bit mode. It is possible to use the SPI interface for booting when GPIF-II is configured in 32-bit mode.