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Configure FX3™ I/O Matrix - KBA95860

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Configure FX3™ I/O Matrix - KBA95860

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Translation - Japanese: FX3™ I/Oマトリックス構成 - KBA95860 - Community Translated (JA)


How do I configure FX3 I/O Matrix?


The SuperSpeed USB controller FX3 CYUSB3014’s I/Os can be configured as GPIO, SPI, UART, I2C, I2S, or GPIF. Up to 61 I/O pins can be configured to function in a variety of modes; the functional mode for each of these pins (or groups of pins) should be set based on the desired system-level functionality.

Multifunction I/O can be configured as GPIO only, GPIF II-16 (16-bit or 8-bit data bus) + SPI + GPIO, GPIF II-16 + UART + GPIO, GPIF II-16 + SPI + UART + GPIO, GPIF II-16 + I2S + GPIO, GPIF II-16 + SPI + UART + I2S + GPIO, GPIF II-32+UART+I2S+GPIO, the following table shows the configured I/O matrix.

With each configuration, the power domain of I/O matrix should be attended to. For example, UART power domain is VIO3 when it is configured as GPIF II-16 bit + SPI + UART + I2S + GPIO, while the power domain is VIO4 when it is configured as GPIF II-32 bit + UART + I2S + GPIO. See Table 7 in the CYUSB301X/CYUSB201X datasheet in for details.

Among all the peripherals, GPIF II, UART, I2S, SPI, I2C, JTAG configuring the I/O matrix will match the most similar configuration. For example, both GPIF-16 bit + I2S + UART and GPIF-16 bit + I2S + SPI configurations will match the GPIF-16 bit + UART + I2S + SPI I/O Matrix.

Note: SPI interface lines are not available when GPIF II is configured in 32-bit mode. It is possible to use the SPI interface for booting when GPIF-II is configured in 32-bit mode.

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‎Feb 21, 2017 10:51 PM
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