Fourth-Generation CapSense®: Advantages

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What are the advantages of fourth-generation CapSense® when compared to third-generation CapSense?

Infineon's PSoC® 4 S-Series features the fourth-generation CapSense, which has several advantages over the third-generation CapSense that is supported in PSoC 4, PSoC 4-M, PSoC 4-L, and PSoC 4 BLE family of devices.

Note: This knowledge base article assumes that you are familiar with CapSense. Refer to the CapSense chapter in the Technical Reference Manual of the respective device for details on CapSense architecture.

Table 1. Advantages of Fourth-Generation CapSense over Third-Generation 

Feature	Third Generation CapSense (PSoC 4, 4-M, 4-BLE, and 4-L)	Fourth Generation CapSense (PSoC 4-S)	Advantages of Fourth-Generation CapSense overThird-Generation CapSense
Sensing Modes	Self-capacitance and Mutualcapacitance modes	Self-capacitance, Mutualcapacitance,and ADC modes	Supports ADC functionality and capacitive sensing using CapSense block:     The fourth-generation CapSense supports ADC input onany GPIO pin by reconfiguring the CapSense hardware.The ADC and CapSense functionality is time-multiplexedand both features can be implemented in the same PSoC Creator project.
Parasitic Capacitance Range	5 pF – 60 pF	5 pF – 200 pF	Supports high-CP designs:     With programmable voltage reference (VREF), the fourthgeneration CapSense can support up to 200 pF of sensor parasitic capacitance (CP) with a sensitivity of 250 counts/pF.
VREF	1.2 V	0.6 V to VDDA–0.6 V	Higher VREF improves signal-to-noise ratio:     The fourth-generation CapSense supports programmable VREF as the input for the comparator. This reference voltage helps in achieving higher SNR when compared to the fixed VREF in third-generation CapSense.
IDAC LSB Size	1.2 uA, 2.4 uA	37.5 nA, 300 nA, 2.4 uA	Lower IDAC ranges providing higher sensitivity:     Higher IDAC resolution (as low as 37.5 nA) in achieving higher sensitivity and accurate sensor calibration

Feature	Third Generation CapSense (PSoC 4, 4-M, 4-BLE, and 4-L)	Fourth Generation CapSense (PSoC 4-S)	Advantages of Fourth-Generation CapSense overThird-Generation CapSense
Split IDAC Capability	Requires two IDACs	Requires one IDAC1	Requires less resource to achieve the same performance:     Only a single IDAC is required to implement 50:50 dualIDAC CSD sensing.
EMI Reduction - Digital	-	Spread Spectrum - CapSensecontrolled	Spread Spectrum clock is generated by hardware, and CPU is completely free:     The fourth-generation CapSense supports generating the sense clock within the CapSense block; the IMO clock is not disturbed while generating the spread spectrum clock. In addition to this, the sense clock frequency can be spread over a predetermined range to reduce the electromagnetic Interference (EMI). This device also provides an option to control the slew rate of the sensor and shield switching signal by configuring the switches inside the CapSense block. This reduces the high-frequency noise generated due to fast switching.
10-bit ADC	No	Yes	ADC using CapSense hardware:     The fourth-generation CapSense supports ADC functionality in addition to capacitive sensing. The ADC supports 8- and 10-bit resolutions. The CapSense and ADC operations are time-multiplexed and can be implemented in the same project.
Hardware State Machine	No	Yes	CPU not required for initialization or spread spectrum clock generation:     Implements hardware sequencers to perform capacitive sensing and ADC functions. These sequencers initialize the CapSense block and does not require CPU bandwidth. The CPU can be turned off during initialization to reduce average power consumption.