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Address Large SRAMs using GPIF2 State Machine – KBA225268


Address Large SRAMs using GPIF2 State Machine – KBA225268

Author: abhinavg_21            Version: *A

Translation - Japanese: GPIF2ステートマシンを使用した大規模SRAMのアドレス指定 – KBA225268 - Community Translated (JA)

How can the GPIF2 state machine of cyfxsrammaster firmware example be modified to address SRAM with 22 address lines?

The default firmware example cyfxsrammaster that comes with FX3SDK can address only up to 1KB (2^8 * 32 bits) of memory. This firmware uses LD_ADDR_COUNT to keep track of address locations already read by the state machine. The current design uses lesser memory (only 1KB), and hence the entire SRAM is read and stored in FX3 buffers.

You can modify the GPIF state machine to address SRAMs with 22 address lines (2^22 * 32 bits = 16 MB). Two threads (TH0 and TH1) are used to read and commit 1 KB of memory chunks alternatively. You will use both counters (LD_ADDR_COUNT and LD_DATA_COUNT) to keep track of address locations. LD_ADDR_COUNT is set to 2^22 and it keeps track of the entire SRAM memory, whereas LD_DATA_COUNT is set to 255 to keep track of 1KB memory. Figure 1 shows the snippet of GPIF2 SM to read SRAM. Figure 1 is the flow diagram of GPIF2 SM to read large SRAM.

Figure 1. Flow diagram for GPIF State Machine to Access Large SRAM


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Last update:
‎Nov 07, 2018 09:10 PM
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