Hyper RAM Forum Discussions

Hello,

On our board we have one HyperRAM (S27KS064 1 DP B HB 02) and one HyperFlash (S26KS512S DP B HM 02).
These memories are connected to a FPGA through a shared bus (Y topology). FPGA implements one CYPRESS HyperBus controller that is connect to HyperFlash through first Chip Select and connected to HyperRAM connected second Chip Select. HyperBus memories at clocked by FPGA with a 100MHz clock.
At power-up, a controller inside FPGA initialize (in sequence) the HyperBus controller, HyperFlash and HyperRAM with following values:
• HyperBus controller
MTR0: 0x00110001
MTR1: 0x0011000F
MCR1: 0x807C0013
• HyperRAM CR0: 0xFFF5

During integration tests, we have some problem with the HyperRAM component.

First, we are not able to read the written value in CR0. Indeed, when we read the CR0 of HyperRAM we read always 0xFFFF or 0x5555.
When we change the written value of CR0 we can observe an impact on our tests. So we think that register has been correctly written, but a doubt persists. When the CR0 is not written at power-up, we read the default value (0x8F1F) described in the component datasheet but not on the first read access.


The second problem has been observed for high temperature (superior at 85°C). We have performed thermal tests of the HyperRAM but we observe than some data inside HyperRAM are corrupted. The number of corrupted data increase at each HyperRAM contents verification.
For information, this is the test procedure that we use:
• Write pseudo-random data in the HyperRAM (the all 8Mbytes of the memory is written)
• Read and verify the content of the memory
• Start again the Read and verify process

The test has been performed at a temperature of 95°C. Which correspond to a die temperature of 105°C for the FPGA and a temperature less than 105°C for the HyperRAM component. So we are in the operational range of the components.

To identify the problem source and to discard a refresh problem, we have perform a specific test which consist to
• At +25°C:
o Write pseudo-random pattern to memory
o Read&check pseudo-random pattern (ensure that there is no error)
• Without doing any HBRAM access:
o Increase temperature to +95°C
o Wait for 30 min
o Decrease temperature to +25°C
• Perform read&check test

During this test we have seen no error. So it’s not a refresh problem.

Moreover, to discard a timing problem, we have perform a test at 95°C without HyperRAM CR0 modification by adapting MTR1 and MCR1 values has follows for HyperBus Controller:
• MTR1: 0x00110001
• MCR1: 0x807D0013
CR0 reset value is 0x8F1F.
During this test, we have observed no error.

The both problem has been reproduced on the S27KS0641DPBHI020 (Industrial HyperRAM gen1) component at 85°C.

So for this moment, we cannot explain these two problems and through all performed tests we think that is not a timing problem.

Have you seen similar problems ?

Additionally, we have performed a test with HyperRAM gen2 component (7KS0642GAHI02).

With the same setup above and by replacing HyperRAM gen1 component by a HyperRAM gen2 component the problem identify on Configuration register 0 disappear. Indeed, with gen2 component we are able to write and read the CR0 register.

We have found an old datasheet of the component (001-97964 Rev. *E ) with an errata chapter.

The problem identify in this document is still valid ?

So, is there known issue on HyperRAM gen1 component ?

Is there an errata document ?

Thanks for your help
Jean

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