generation of the clock

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Anonymous
Not applicable

hi,

   

 I am using the S6E2CC series controller i want  to generate the clock from the timer module if any done this can you explain me (i want to generate the 16 ,25, 50 mhz frequency),

   

Best regards 

   

Maheshwar

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1 Solution
bharadhwajas_91
Employee
Employee
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Hi,

   

You can use a timer to divide the clock and output the signal on a pin but you need to GPIO Output Characteristics for the max output freq supported in the device datasheet.

   

http://www.cypress.com/file/235126/download

   

You can get the driver library here :

   

http://www.cypress.com/documentation/software-and-drivers/peripheral-driver-library-pdl

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3 Replies
bharadhwajas_91
Employee
Employee
First like received First like given

Hi,

   

You can use a timer to divide the clock and output the signal on a pin but you need to GPIO Output Characteristics for the max output freq supported in the device datasheet.

   

http://www.cypress.com/file/235126/download

   

You can get the driver library here :

   

http://www.cypress.com/documentation/software-and-drivers/peripheral-driver-library-pdl

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Anonymous
Not applicable

hi,

   

we wants to generate the ethernet clock out from the ECOUT pin in the S6E2CC controller to feed to the PHY, Also what are the changes we need to make to send a packet through the ethernet , we are using the stack given by th you.

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HolgerW_56
Employee
Employee
25 sign-ins 25 solutions authored 10 sign-ins

Hi,
have you seen these examples?

   

http://www.cypress.com/documentation/software-and-drivers/software-example-demonstrate-lwip-fm4
http://www.cypress.com/documentation/software-and-drivers/software-example-running-freertos-fm4-lwip...

   

The ECOUT clock module can be enabled with symbol EMAC_ECOUT in emac_user.h.
But ... the jitter tolerance may be out of spec for most PHYs, so it is not recommended.

   

Regards,

   

Holger

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