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PSoC™ 6
Discussion forum regarding PSoC™ 6 - 32-bit Arm Microcontroller (MCU) Forum, discusses the 40-nm technology - best combination of ultra-low-power consumption, flexibility, security and high-performance topics.
PSoC™ 4
PSoC™ 4 - Arm®-based Forum, discusses the low-power Cortex®-M0 and Cortex®-M0+ cores, CapSense®, and Bluetooth® Low Energy
PSoC™ 5, 3 & 1
The PSoC™ 5LP, PSoC 2 and PSoC 1 Forum discusses - 24-bit Digital Filter Block (DFB), 24 UDBs, DMA controller and integrating AFE, digital logic with user interface ICs with an Arm Cortex-M3 CPU solutions.
CAPSENSE™ & MagSense
The Sensing Technology Forum discusses CAPSENSE™ - capacitive-sensing and MagSense inductive-sensing for consumer, industrial, automotive, and Internet of Things (IoT) applications.
XMC™
AURIX™
In this forum you can post your questions, comments and feedback about the 32-bit AURIX™ TriCore™ Microcontroller. The AURIX™ offers the highest scalability in performance, memory & peripherals across application. It is a safe and secure companion chip, meeting both the ISO functional safety standards and EVITA full security standards. Here you can also find the links to the latest board pages, SW and Tools GitHub, trainings, documents and FAQs
TRAVEO™ T2G
Discussion forum regarding 32-bit TRAVEO™ T2G Microcontroller - based on ARM® for automotive body electronics applications; cutting-edge performance, safety, and security features topics.
MOTIX™ MCU
The MOTIX™ MCU forum is designed for you to post your questions, comments and feedback about the famous Embedded Power ICs at anytime. Ask your technical questions or explore existing content!
Legacy microcontrollers
Featured Discussions
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I am trying to use the BLCD Shield. I am unable to update setparameter(), which led me down the rabbit hole of downloading Kiel uvision5, buying a j-link mini and trying to install Config Wizard, all in order to fix the setparameter() issue which seems to still persist on the BLCD Shield platform, 2 years after being first identified.
my current roadblock is the downloading of the Config Wizard 1.x at https://infineoncommunity.com/2018Aug_GLOB_ATV_GATED_Config_Wizard_Id1003. I filled out the information and was emailed a link for downloading the software as well as other links. No link works. I would really like to get this working (with the ultimate goal, to run a motor using the BLDC Shield through an arduino. Any help would be appreciated.
Hi,
I have a AURIX MotorControl Application Kit with TC234LF, I want to switch from ADS to Visual Studio Code. I'm going to make it through the GCC compiler, but there is a problem using the winIDEA debugger. WinIDEA requires a license. I did not find a price list on the website and how to buy it.
Are there alternative debuggers that can be used in Visual Studio Code?
Hi infineon
As the title said, I got a problem with "Vddk", I use the next formula to configure "Vddk", but some products(not all, same program) will exceed the threshold(±2%) when ambient temperature increasing, and the calculated value close to low boundary? Could you give me some advise? Thanks
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i'm trying SPI_CPU_1_KIT_TC334_LK.. I've joined SPI_A to SPI_B (confirmed on schematic for dev kit - - i hope).
when the code runs i dont have an LED on which says the data has transfered ok -- 😞 .. sad face .
i've run it a few times and set a break point . plus used a logic analyser ..
if i disconnect the MISO / MOSI lines i receive no data .. so i know the SPI slave is getting data.. ..
i've added this line , but nothing has changed ..
spiSlaveConfig.base.mode = SpiIf_Mode_slave; /* Configure the mode */
into the init config for the slave module..
i will continue to look but if anyone has seen this before.....
Hello!
I have the following code that is not working. After first call of readRegister response is 0, after calling readRegister the second time, I receive the expected value.
Can you please help? I must mention that my application is based on the Infineon SPI_CPU_TC334 training and I've also tried to change spiMasterChannelConfig.channelBasedCs but I still don't receive the expected behavior.
I've also attached the source code for QSPI.
Thank you!
/**********************************************************************************************************************
* \file Cpu0_Main.c
* \copyright Copyright (C) Infineon Technologies AG 2019
*
* Use of this file is subject to the terms of use agreed between (i) you or the company in which ordinary course of
* business you are acting and (ii) Infineon Technologies AG or its licensees. If and as long as no such terms of use
* are agreed, use of this file is subject to following:
*
* Boost Software License - Version 1.0 - August 17th, 2003
*
* Permission is hereby granted, free of charge, to any person or organization obtaining a copy of the software and
* accompanying documentation covered by this license (the "Software") to use, reproduce, display, distribute, execute,
* and transmit the Software, and to prepare derivative works of the Software, and to permit third-parties to whom the
* Software is furnished to do so, all subject to the following:
*
* The copyright notices in the Software and this entire statement, including the above license grant, this restriction
* and the following disclaimer, must be included in all copies of the Software, in whole or in part, and all
* derivative works of the Software, unless such copies or derivative works are solely in the form of
* machine-executable object code generated by a source language processor.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
* WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE
* COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN
* CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*********************************************************************************************************************/
#include "Ifx_Types.h"
#include "IfxCpu.h"
#include "IfxScuWdt.h"
#include "QSPI_Config.h"
#include "Timers.h"
#define LED &MODULE_P00,5
IFX_ALIGN(4) IfxCpu_syncEvent g_cpuSyncEvent = 0;
volatile uint8 delay;
static unsigned char response = 0;
void core0_main(void)
{
IfxCpu_enableInterrupts();
/* !!WATCHDOG0 AND SAFETY WATCHDOG ARE DISABLED HERE!!
* Enable the watchdogs and service them periodically if it is required
*/
IfxScuWdt_disableCpuWatchdog(IfxScuWdt_getCpuWatchdogPassword());
IfxScuWdt_disableSafetyWatchdog(IfxScuWdt_getSafetyWatchdogPassword());
/* Wait for CPU sync event */
IfxCpu_emitEvent(&g_cpuSyncEvent);
IfxCpu_waitEvent(&g_cpuSyncEvent, 1);
//init1msTimer();
initQSPI2Master();
initQSPI2MasterChannel();
resetIMMU();
selfTestIMMU();
/*uint8 xGyro, yGyro, zGyro;*/
while(1)
{
response = readRegister(WHO_AM_I, 0x00);
// response = readRegister(WHO_AM_I, 0x00);
//readIMMUAxis(&xGyro, &yGyro, &zGyro);
}
}
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Hello!
Details of the project layout:
In my project I am using PSoC 6: CY8C62xA, and in the flash memory I store 2 identical images (1MB each in size). That enables me to upgrade image easier and switch between them. I use RTOS on the CM4 core, and CM0p is baremetal.
Plan:
I wanted to place an application bootloader at the beginning of the image to handle some additional logic and in future use it to enable the rest of the application to be position independent code. That application bootloader would still be in flash and start where normally the image would at the beginning. I modified linker to shift the application image by the size of the bootloader and added the jump logic from bootloader to an application:
1. dissabling IRQs and clearing pending ones
2. dissabling all enabled interrupts in NVIC
3. dissabling all enabled peripherals that might generate interrupt
4. dissabling SysTick and its exception pending bit
5. properly excuting__set_MSP, __set_CONTROL, and __set_PSP functions
6. jumping to application using function pointer and going directly to Vtable address of cm0p core
This will jump to the CM0p code of the application where Cy_SysEnableCM4(m4_addr) will start the cm4 core as well. RTOS tasks will run with no issues, everything works correctly except adc.
Problem:
I narrowed down the problem to cyhal_adc_read() funciton on cm4 side of the application. Adc init is fine, but the program stops when trying to execute this function. The interrupt is not starting, but I am not sure if the adc interrupt or IPC one is messed up.
When I halt the CPU, I can see through JLink that there is no hard fault and PC is not stuck at one place. When checking the map, everything is okay, vector table is where it should be.
I checked the map, everything is okay, vector table is where it should be, it is filled correctly.
Does anyone have any ideas what to look for, what could be wrong?
Please let me know if you have some questions or if I need to provide more details.
Thank you!
Show LessHello,
We are developing the bootloader for the Infineon TC377 board. For that, we need the preserved RAM (The memory that shouldn't be initialized with zero during the controller reset) to hold the flag. So, we tried the keywords below for No-initialization and location, but AURIX is not supporting these keywords. Instead of the below keywords, what can be used to create the memory in the RAM, so that it shouldn't be modified after reset of the microcontroller.
#pragma NOINIT(BootMode_InPreservedRAM)
#pragma LOCATION(BootMode_InPreservedRAM,0x50000000)
/*Here first we are creating the variable BootMode_InPreservedRAM as no initialization and giving the address as 0x50000000 for LOCATION*/
Thanks in advance.
Show LessHi,
I was going through document AN2358 which suggests an approach to implementing a Manchester decoder.
I have a query about the implementation.
IEEE 802.3 Ethernet standard states that the input data (Manchester encoded) may have a jitter of +-18ns. Now if this is used in a decoder with a fixed delay count (3/4) to sample an input data bit, how will this circuit sample the correct data and produce the recovered output?
Is there any other way this jitter in the input data can be handled to recover the correct data bit?
Thanks
Pulkit
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I can program the psoc5 using openocd now, with some caveats. However, if an NVL entry exists, it stops.
I have a project which somehow did something to the NVL.
I understand setting the Reset condition on the Pins can cause this. However, setting the pins to Don't Care doesn't fix this problem, so I suspect something else is causing the NVL to change.
Is there *any* gui / command line interface to find out what is causing the NVL to be set? (so it can be "fixed" in the project?)
This would not normally be a problem, but using openocd to program the psoc halts when the NVL entry is in the Creator generated hex file. I have multiple reasons for using openocd, some of which involve production machines. Others are very fast compile/debug cycle. (https://socmaker.com/?p=1004, and https://socmaker.com/?p=1027)
If I use objcopy, could I exclude that from the elf file for the new obj? (before making a hex file) If so, would it be by address? If so, which address? otherwise, how would I do that exclusion?
Is there a way to use openocd to program the NVL (perhaps kitprog in kitprog mode?) (Just checking)
Thanks!
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TraveoII
UART buadrate Setting
by chandan1995 Jun 19, 2023