Jul 20, 2021
08:38 PM
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Jul 20, 2021
08:38 PM
I now use S6E2HG's CSIO SPI as master to control LTC1867 (read 6-channel AD conversion value), CSIO's SPI supports the following timings:
None of the above can meet the requirements of LTC1867.
LTC1867 requires:
The signal mark level of serial clock output is set to LOW,and
The transmit data is output at a rising edge of serial clock
Can FM4 CSIO SPI mode meet this requirement? Please expert for guidance.
Thanks.
Solved! Go to Solution.
- Tags:
- CSIO SPI
1 Solution
Jul 22, 2021
08:11 PM
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Jul 22, 2021
08:11 PM
3 Replies
Jul 21, 2021
06:54 PM
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Jul 21, 2021
06:54 PM
Please have a look at https://www.cypress.com/documentation/application-notes/an99218-multifunction-serial-interface-fm-mc...
Roy Liu
Jul 21, 2021
08:03 PM
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Jul 21, 2021
08:03 PM
Hello, teacher, may I ask, can Mode0(Mode1) communicate with SPI interface chip ?
Jul 22, 2021
08:11 PM
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Jul 22, 2021
08:11 PM
Yes, Mode0(Mode1) can communicate with SPI interface chip ?
Roy Liu