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Clocks

kaas_3976181
New Contributor

About CY2304.

Is there a problem with how to input the same CLK as the REF terminal to the FBK terminal?

In Japanese。

CY2304の使い方ですが、FBK端子に、REFのクロックをそのまま入力する回路を見ました。

このような使い方は初めて見るのですが、PLLの誤動作などのリスクはありませんか?

メッセージ編集者: Katsuyuki Asai 一部、文言を修正しました。

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1 Solution
PradiptaB_11
Moderator
Moderator

Hi,

A feedback connection should be made from one of the 4 output connections/pins of the IC. Then only the output will match the Input and PLL will be in a locked state. If you apply the reference only as Input and feedback then there is no guarantee that the output is following the input. In fact the PLL is not even utilized in this situation.

Thanks and Regards,

Pradipta.

View solution in original post

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2 Replies
PradiptaB_11
Moderator
Moderator

Hi,

A feedback connection should be made from one of the 4 output connections/pins of the IC. Then only the output will match the Input and PLL will be in a locked state. If you apply the reference only as Input and feedback then there is no guarantee that the output is following the input. In fact the PLL is not even utilized in this situation.

Thanks and Regards,

Pradipta.

View solution in original post

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