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This is an example of the DDS sine signal generator running on PSoC4200M CY8CKIT-044 Pioneer Board.
Like the previous example, this project also uses Double-Buffered DMA to update the IDAC8. The data are being calculated in the real time by DDS, and the IDAC is operated in bidirectional mode, which requires setting IDAC's direction (sign) and magnitude.
- 32-bit DDS accumulator provides frequency resolution clk_1/2^32 = 480kHz/2^32=0.0001Hz
- Usable range 0 - 20kHz, with some tweaks up to 100kHz
- The output sine is centered around Vref (here Vdd/2 was used)
- The sine amplitude is controlled by a singe resistor R1, default is +/-1V
- Uses DMA to update the IDAC
The drawback is that now two bytes have to be populated in the temporary buffer array {CTRL, data}, which consumes more processor clocks. This load, however, is quite low, reaching in current example only ~20% of all processor time.
The Double-Buffered DMA uses intermediate RAM Buffer of size 2N=64 bytes made of two equal halves, to store the data coming from the data source. The DMA1 consists of two chained Transfer Descriptors TD0 and TD1, copying 2 bytes from the Buffer to the IDAC on each clock. Once TD0 finishes copying the data from the first half of the Buffer, it chains to the TD1, which copies data from the second half of the Buffer and loops back to TD0.
Once TD0 (or TD1) is completed, an interrupt is fired, signaling that this Buffer half needs replenishment (while the other one is busy). At this point processor need to fill the half-Buffer with generated waveform, and wait for the next data request, while the Buffer content is being continuously played without interruption.
Sine wave is generated in real-time using 32-bit software DDS blocks, which return 8-bit sine waveforms based on the lookup table.
The IDAC is used in bipolar mode, both Source and Sink, controlled by the sign of the input data. The IDAC current is converted into voltage using 3.3k resistor and buffered by the Opamp in the transimpedance mode. The Opamp output is centered around the reference voltage (Vdd/2): Vout = 0.5Vdd +/- 1.0V.
By default the project is configured to start playing sine waveform on startup, continupusly sweeping the frequency between 1kHz and 2 kHz for 10sec.
Project attached contains all necessary files. It was tested using both Creator 4.0 and Creator 4.4.
Figure 1. Project schematic. The sine waveform is generated by DDS_1 on request, and then transferred from the Buffer to the IDAC using DMA. The IDAC output current direction is controlled by the sign of the data. The IDAC operates in transimpedance mode using using 3.3k feedback resistor, producing 0.5Vdd +/- 1.0V signal.
Figure 2. Output waveform. DDS set frequency 1kHz. Yellow - DDS output, centered around Vdd/2. The half-Buffer length to be populated is 64, and DMA sampling clock is 480 kHz, which results in 7.5 kHz ISR rate. DDS routine calculations take about 28usec, resulting in processor load of less than ~3%.
Figure 3. FFT of the DDS output. Set frequency 1 kHz
Figure 4. Example of continuously sweeping the DDS frequency between 1kHz and 2 kHz. Scope display persistency is set to 1 sec.
Figure 5. Project annotation using the PSoC Annotation Library v1.0 and KIT-044. The Red LED pin was used for the performance testing; it raises on ISR routine entry, and lowers on exit. The duty cycle on this pin shows the processor load (~3%). The reference voltage is "stolen" from the hidden Pin_5[0], which is connected to the Vdd/2 onboard source. For sound generation, the output can be directly connected to the headphones with combined impedance of 64oHm (32+32). Capacitors shown are optional and don't affect output significantly.
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Show LessHello,
I see the build warning as below in the latest MTB 3.2 version. Is this an issue that can be fixed by Infineon or else it is upto the ARM?
-I../mtb_shared/wifi-host-driver/release-v3.1.0/WiFi_Host_Driver/src/include -I../mtb_shared/wpa3-external-supplicant/release-v1.1.0/include -I../mtb_shared/wpa3-external-supplicant/release-v1.1.0
../mtb_shared/mbedtls/mbedtls-2.25.0/library/ssl_tls.c: In function 'ssl_calc_finished_tls_sha384':
../mtb_shared/mbedtls/mbedtls-2.25.0/library/ssl_tls.c:3267:5: warning: 'mbedtls_sha512_finish_ret' accessing 64 bytes in a region of size 48 [-Wstringop-overflow=]
3267 | finish( &sha512, padbuf );
| ^~~~~~~~~~~~~~~~~~~~~~~~~
Regards,
Karthik
Show LessHello,
We are using 1YN - CYW43439 with CYW4343A2_001.003.016.0031.0000.1YN.hcd firmware. We are experiencing the following error when we connect multiple Android devices.
[DEL] Device 75:52:F2:2E:99:A8 Galaxy M33 5G
[7F-40-50-E7-88-6C]# [ 4455.602130] Bluetooth: hci0: command 0x2006 tx timeout
[ 4457.682230] Bluetooth: hci0: command 0x200a tx timeout
[ 4459.762186] Bluetooth: hci0: command 0x2006 tx timeout
We tried the following but didn't help:
echo 0 > /sys/class/rfkill/rfkill0/state
echo 1 > /sys/class/rfkill/rfkill0/state
The problem is only solved when we reboot the system. Is there any other solution to this timeout problem such as reloading the device firmware? Can we force reload the firmware using `hcitool`?
Thanks for all the help!
Mesih
Show LessHello,
I am using the BLDC shield TLE9879 with Arduino through Arduino IDE, to simply drive a BLDC motor with the HALL mode.
Is it possible to have access to the speed/current measurements from the TLE9879 through arduino?
Should i use Keil through a J-link to modify TLE9879? Or something similar?
We have a custom board in which we are using PMIC consisting of IRPS5401MTRBF chip, to get knowledge about this we have ordered EVAL_PS5401-25A (EVK Board)
We are using PowIRCenter Build Tool for configuring EVK board, we are connecting the EVK board to Host PC with USB005 V1.0. We have followed the instructions from PowIRCenter tool User guide we have device (Rocky Family) and selected target board.
We had configured using EVK board user guide and input voltage for all four switchers (A, B, C, D) and LDO is 5V. In the configuration of PM Bus status, we are seeing some error as shown in image below, we want to know whether we should change anything in configurations to remove those errors.
when we are not able to get excepted output (voltage values) as shown in image below these values are generating only when we are writing into the OTP memory (user section 26 OTP's)
And in the configurations, we have observed that Input voltage is taking as 12V, but in configuration I had given 5Vin.
Could anyone forward a default configuration file where we can see the excepted output, and let me know how to write an
output into the register directly by giving any detailed user guide.
Thanks & Regards
Navin
Show LessI have a CYBT-343026-01 module and I want to connect a speaker and want to play the sound using CYBT-343026-01 module with the help of Audio_headset app and Audio_watch app. so is there any way to connect audio speaker and play them using CYBT-343026. if any then please provide the help also please suggest any app, which can be build easily to play on CYBT-343026-EVAL board.
Show Lesszhege
smartconx_target@Q!w2e3r4t5y6u7i8o9p0||/t5/%E6%99%BA%E8%83%BD%E7%94%B5%E6%BA%90%E5%BC%80%E5%85%B3/%E6%8E%A5%E5%9C%B0/td-p/723904
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