Featured Discussions
After disable and re-enable TRNG on TC397, the random number sequence read from DATA32 is same over every reset (including power-on reset and reset button). on development kit)
Board: KIT_A2G_TC397_5V_TFT
Initialize code.
NVIC_EnableIRQ(TRNG_IRQn);
TRNG_CTRL = 6;
NVIC_ClearPendingIRQ(TRNG_IRQn);
// Some delay by busy loop
TRNG_CTRL = 2;
// Read TRNG_DATA32
cpsie i
Interrupt handler.
if (TRNG_STAT has FIPS_ERR or WARN) {
TRNG_STAT = 0x0408;
} else if (TRNG_STAT has RDY) {
// Read TRNG_DATA32
}
I record the DATA32 of the first, second, 100th and 200th interrupts. The four numbers are different in one reset cycle. But the first random number is the same in different reset cycle. So is the second, 100th and 200th number. No FIPS_ERR and WARN is reported.
smartconx_target@Q!w2e3r4t5y6u7i8o9p0||/t5/AURIX/TRNG-on-TC397-generates-same-random-sequences-over-reset/td-p/722285
Show LessHello,
When two different types of overlays are stacked.
What is the formula for calculating capacitance?
In the case of one overlay, the following is
When overlaying two different types of overlays,
(The following is an image. For example, OVERLAY1 is glass, OVERLAY2 is PET film)
What is the formula for calculating capacitance?
(For example, will overlay 2 be added?)
Best Regards,
Kawata
smartconx_target@Q!w2e3r4t5y6u7i8o9p0||/t5/TRAVEO-T2G/CYT2B7-CYT2B9-CYT2BL%E5%A4%9A%E6%A0%B8%E9%97%AE%E9%A2%98/td-p/722270
Show LessBTN8982TA The silkscreen doesn't match the specification on the official website, would like to help with this, thanks.
smartconx_target@Q!w2e3r4t5y6u7i8o9p0||/t5/%E4%BC%A0%E7%BB%9F%E5%BE%AE%E6%8E%A7%E5%88%B6%E5%99%A8/BTN8982TA-%E4%B8%9D%E5%8D%B0%E4%B8%8E%E5%AE%98%E7%BD%91%E7%9A%84%E8%A7%84%E6%A0%BC%E4%B9%A6%E5%AF%B9%E4%B8%8D%E4%B8%8A/td-p/722268
Show LessHow do I connect the INFINEON EVALM1IM828ATOBO to a DC power supply? Which terminal is it connected to? What is the value of the connected voltage? Thank you for answering the question!
smartconx_target@Q!w2e3r4t5y6u7i8o9p0||/t5/%E7%94%B5%E6%B1%A0%E7%AE%A1%E7%90%86IC/INFINEON-EVALM1IM828ATOBO%E5%A6%82%E4%BD%95%E6%8E%A5%E7%9B%B4%E6%B5%81%E7%94%B5%E6%BA%90/td-p/722257
Show LessHi,
Jetson Nano kit + cyw5557x AIRROC chip
Jetson is on latest 32.6 package and 4.9 kernel.
I have a working cyw5557x drivers connecting to a SSID [Wireless Router].
searching through the posts, i tried wl monitor 1 command and it does NOT work.
plz let me know if Monitor mode is supported on cyw5557x.
Also where to find new drivers and/or new releases.
Thanks
Show LessFS3L40R07W2H5F_B11的IGBT模块建议选择哪些驱动芯片呢?需要考虑哪些因素呢?
Hi
We recently started to play with the CYW20829 chip and are considering migrating a hardware application we originally built on the CYW20719B2 chip to it.
In porting code for a SPI NAND Memory chip over to the new 20829, we are having trouble mapping the WICED APIS to the CY_HAL API's and getting them to work.
We are not getting any errors from init, are using the default PINS on device configurator for the 20829, but we are getting fails on reading and writing using cy_hal_spi_slave_read, and cy_hal_spi_slave_write.
Here is a snippet from the 20719B2 Code that sets up the device and our attempt to migrate the equivalent code to 20829
Our code drives the CS pin High and Low before doing Read/Writes w/o issue on the 20719, but not sure we have the correct method figured out on the 20829
20719 INIT Code
wiced_hal_gpio_select_function(NAND_CS_PIN, WICED_GPIO);
wiced_hal_gpio_select_function(NAND_SCK_PIN, WICED_SPI_1_CLK);
wiced_hal_gpio_select_function(NAND_MOSI_PIN, WICED_SPI_1_MOSI);
wiced_hal_gpio_select_function(NAND_MISO_PIN, WICED_SPI_1_MISO);
wiced_hal_gpio_configure_pin(NAND_CS_PIN, GPIO_OUTPUT_ENABLE | GPIO_PULL_UP, GPIO_PIN_OUTPUT_HIGH);
wiced_hal_pspi_init(SPI1,FS_NAND_HW_SPI_CLK_FREQ / 2,SPI_MSB_FIRST,SPI_SS_ACTIVE_LOW,SPI_MODE_3);
20829 INIT Code
20719 Drive CS Up or Down
wiced_hal_gpio_set_pin_output(NAND_CS_PIN, GPIO_PIN_OUTPUT_LOW);
wiced_hal_gpio_set_pin_output(NAND_CS_PIN, GPIO_PIN_OUTPUT_HIGH);
20829 Drive CS Up or Down
We have tried both of these:
cyhal_gpio_toggle(CYBSP_SPI_CS);
or
cyhal_spi_slave_select_config(&mSPI,CYBSP_SPI_CS,CYHAL_SPI_SSEL_ACTIVE_LOW);
cyhal_spi_slave_select_config(&mSPI,CYBSP_SPI_CS,CYHAL_SPI_SSEL_ACTIVE_HIGH);
Our Read/Write Looks like this
20719
wiced_hal_pspi_rx_data(SPI1, NumBytes, pData);
wiced_hal_pspi_tx_data(SPI1, NumBytes, pData);
20829
cyhal_spi_slave_read(&mSPI,pData,&size,10);
cyhal_spi_slave_write(&mSPI,pData,&size,10);
Any help would be appreciated !!
Show Less
Could you please provide guidance on the methodology or equations required to calculate the values of these capacitors? Any insights or resources you could share would be immensely helpful in my analysis and design process.
Thank you very much for your attention to this matter. I look forward to your response and appreciate your assistance.
Best regards,
Show Less