GPIF design with master mode to implement 8080 interface

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Anonymous
Not applicable

Hi,

   

 

   

I'm design a bridge to read/write 8080 type device through USB. But I have problem on the GPIF2 waveform design. For write operation, I can use DMA_RDY_CT to trigger write operation. But how to trigger read operation?

   

A sample project that uses GPIF2 as master to interface with a SRAM type device would be much appreciated.

   

 

   

Thanks!

   

Rover

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1 Reply
Anonymous
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 Follow http://www.cypress.com/?app=forum&id=167&rID=77487.

   

 

   

Regards,

   

Gayathri

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