- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
I have a project with 9 inputs (pots) to the adc via hardware mux and 9 capsense inputs. This is just the analog portion of the project. Is there any reason not to interleave the pin selection on these? I have a routing that works that does this. I have placed all of these on the left side gpio section. This is convenient for external connections. I want to check to see if it matters whether or not I place all of this on one side or if it's better to do the adc and mux on the left and all capsense on the right.
- Labels:
-
PSoC 3
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
One issue you might run into is that you can couple in unwanted noise from the CapSense pins into your analog inputs. This is something you need to look for.
There is an AppNote from Cypress regarding board design: http://www.cypress.com/?rID=39677 which might be helpful for you. Also look at the related notes (AN58304, AN58827) for hints regarding pin selection and analog routing.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
There is also a video regarding layout for CapSense: http://video.cypress.com/video-library/video/Touch-Sensing/CapSense-Layout-Best-Practices-Video-Part...
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Thanks
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content