Switching noise with PSoC 5LP boost converter

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Anonymous
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I'm planning to make a handheld LCR meter (plus more) based on the PSoC 5LP. I'd like to use the boost converter to allow me to power it efficiently off 2 AA cells.

   

However, the nature of the device is that it does sensitive analog measurements. In ESR mode, for instance, it generates a waveform at around 100mV, and has to accurately measure the attenuation. When measuring inductance or capacitance, it likewise has to generate and accurately measure waveforms, at frequencies from a few kilohertz up to about 1MHz.

   

Will I see significant coupling of noise from the boost converter into the analog signals I'm measuring? What steps can I take to prevent it - and is it practical to eliminate the noise to an acceptable degree in a handheld application with a reasonable cost constraint? How about layout recommendations?

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ETRO_SSN583
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This might help -

   

 

   

www.cypress.com/

   

 

   

Notice additional links at bottom for other ap notes.

   

 

   

I would advise some work with a starting proto and a spectrum analyzer

   

to see how much clk feedthru you get from PSRR on OpAmps and general

   

layout issues.

   

 

   

In this link they mention boost converter for -050 kit, but do not join it with

   

20 bit performance discussed earlier. Besides the A/D behaviour not

   

characterized at boost switching frequencies, so not sure we can infer much

   

from 20 bit performance.......

   

 

   

www.cypress.com/

   

 

   

www.cypress.com/

   

 

   

Regards, Dana.

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ETRO_SSN583
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I would think Mhz performance might be at issue, there are no PSRR curves,

   

and if you look at a G = 16 in a PGA (just to get an idea) you are down 20 db

   

from the G = 16 DC value. Not much BW left. GBW for the OpAmps is 8 Mhz

   

typ, just for a gauge.

   

 

   

Regards, Dana.

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Anonymous
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 Thanks, that appnote will be very useful. I'm hoping this is something Cypress have considered, though, since the chip combines the boost converter and sensitive analog electronics, this seems like a natural matchup!

   

The PSoC 5LP ADC goes up to 1MHz, so it's definitely sampling in the range of frequencies produced by the 400KHz boost regulator.

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HeLi_263931
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When you don't need the full sample rate, you can always do oversampling / averaging. Esp. with the latter, you can skip the highest and lowest samples in your averaging window, which should make it more effective.

   

You also can use the digital filter to reduce noise.

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HeLi_263931
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btw: according to the data sheet (http://www.cypress.com/?rID=72824 ) the PSoC5LP can run with a supply voltage as low as 1.8V. So for two cells, you won't need the boost converter at all.

   

Also, the analog core has its own voltage regulator, so it might not be affected as much by the boost converter (which seems to be located on the opposite side of the chip, judging from the pinout).

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ETRO_SSN583
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Of course w/o a boost converter analog specifications and dynamic range are reduced,

   

so beware of LV affects.

   

 

   

Why can we not get something for nothing, the bane of engineering ?

   

 

   

Regards, Dana.

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HeLi_263931
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Anonymous
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 @hli: Unfortunately, I'm interfacing with devices that are 3.3 or 5v. And I need more headroom for analog applications than 1.8v allows. Also, LDOs aren't very good at filtering out high frequency switching noise.

   

Also, although there's a separate internal analog regulator, the appnote still recommends separate main regulators for digital and analog. I'm thinking I may set the boost regulator to the max - 5.5 volts - then use two separate LDOs for digital and analog, along with plenty of decoupling caps and perhaps some ferrites. I'm optimistic that will be sufficient.

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ETRO_SSN583
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Look into using Polymer Tantalums, along with .01 and .1 ceramic. The

   

polymers are ~ 10 x better esr than traditional tantalums.

   

www.low-esr.com/esrfreqperfcurves.asp#NPC

   

www.niccomp.com/help/techinfo/ESR-Freq_TC-NSPE-H-NACY-0809.pdf

   

 

   

Regards, Dana.

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HeLi_263931
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You didn't mention any peripherals. I was assuming that the idea was to put anything inside the PSoC (esp. when reading the proposal over at DP)

   

If you really care about analog performance, it might be a good idea to use an external boost converter. This makes decoupling easier, since then there is no switching circuit inside of the PSoC core. You also could select a converter which generates less ripple and noise for your intended load.

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crcac_264396
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        would one of those "ripple eater" circuits clean up the switching noise.   
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ETRO_SSN583
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Not sure what you are looking at, "ripple eate circuits", but 3 terminal

   

regulators, as a class, reject ripple at ~ Aol reduction of the error amp

   

used in regulator. Other techniques, at higher frequencies, via use of

   

phase shift, like all pass filter, and feedback can aid in rejecting some

   

correlated signals.

   

 

   

Regards, Dana.

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