OUT Bulk endpoint not ready

[Anonymous]

 Hi

       

i have a device where my FX3 is connected to FPGA as a slave fifo. In gipf i configured 4 flags

   

1.) FLAG_A => OUT RDY

   

2.) FLAG_B => OUT WATERMARK

   

3.) FLAG_C => IN RDY

   

4.) FLAG_D => IN WATERMARK

       

I can see that IN endpoint is up and running. Clearly the FLAG_C indicates everthing is ok. Also when i send data from Host to Device i can see that it is correctly received.

   

However OUT Endpoint is not ready ever. From the beginning the FLAG_A indicates that OUT EP is down. If i decide to ingore the FLAG_A and just write into FX3 clearly the data is never transfered to host.

       

If i strobe the PKTEND my host will always read zero-length packet.

       

Anyone had simillar issue. Can you help me what could be reason for this strange behvaiour?

       

Thank you

       

Mirza

[Anonymous]

Hi Mirza,

   

Please help me in understanding your problem correctly.

   

1.) FLAG_A => OUT RDY

   

2.) FLAG_B => OUT WATERMARK

   

3.) FLAG_C => IN RDY

   

4.) FLAG_D => IN WATERMARK

   

At your side, you don't see any issue for the following data path:

   

FPGA --> FX3 IN endpoint --> PC

   

You are saying that you have problem with the OUT data transfers:

   

PC --> FX3 OUT endpoint --> FPGA.

   

As per my understanding you are facing probelm in the above mentioned data path. Please let me know if my understanding is correct.

   

If yes, then how are you giving the PKTEND# in this direction?. Also please let me know the number of bytes that you are transferring.

   

Thanks,

   

sai krishna.