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There are various drive modes in PSoC 1. Can anyone tell me what is the difference between Open-drain high, Strong and Pull-up drives mode?
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PSoC 1
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Hello Tanisha,
On your question
Open drain high ==> Writing a '1' to the pin connects it to Vdd and writing a '0' puts the pin in hi-z (floating)
Strong drive ==> Writing a '1' connects the pin to Vdd and writing a '0' connects it to GND
Pull-up drive ==> Writing a '1' connects the pin to Vdd through a resistor, approximately 5.6 KOhm, and writing a '0' connects it to GND.
You can find more details on PSoC 1 drive modes in this application note: AN2094; the AN page also has 2 videos covering most relevant PSoC 1 GPIO topics.
Regards,
Meenakshi Sundaram R
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Thanks for the application note reference. It was really useful.
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Can a PSoC pin act like a gound sink?
Help me please
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That's defined datasheet of each device.
This is Cy8C29x66.
3.3.2 DC General Purpose IO Specifications The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and -40°C ≤ TA ≤ 85°C, or 3.0V to 3.6V and -40°C ≤ TA ≤ 85°C, respectively. Typical parameters apply to 5V and 3.3V at 25°C and are for design guidance only. Table 3-5: DC GPIO Specifications | ||||||
Symbol | Description | Min | Typ | Max | Units | Notes |
RPU | Pull up Resistor | 4 | 5.6 | 8 | kΩ |
|
RPD | Pull down Resistor | 4 | 5.6 | 8 | kΩ |
|
VOH | High Output Level | Vdd - 1.0 | – | – | V | IOH = 10 mA, Vdd = 4.75 to 5.25V (8 total loads, 4 on even port pins (for example, P0[2], P1[4]), 4 on odd port pins (for example, P0[3], P1[5])). 80 mA maximum combined IOH budget. |
VOL | Low Output Level | – | – | 0.75 | V | IOL = 25 mA, Vdd = 4.75 to 5.25V (8 total loads, 4 on even port pins (for example, P0[2], P1[4]), 4 on odd port pins (for example, P0[3], P1[5])). 150 mA maximum combined IOL budget. |
VIL | Input Low Level | – | – | 0.8 | V | Vdd = 3.0 to 5.25. |
VIH | Input High Level | 2.1 | – |
| V | Vdd = 3.0 to 5.25. |
VH | Input Hysterisis | – | 60 | – | mV |
|
IIL | Input Leakage (Absolute Value) | – | 1 | – | nA | Gross tested to 1 μA. |
CIN | Capacitive Load on Pins as Input | – | 3.5 | 10 | pF | Package and pin dependent. Temp = 25oC. |
COUT | Capacitive Load on Pins as Output | – | 3.5 | 10 | pF | Package and pin dependent. Temp = 25oC. |
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From the TRM -
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thank's for the suggestion...
now I'm working with an input from 2,5 V 900hz pulse generator, I want to make it a simple flat gnd level voltage when the input connected to my pin that has pull-up drive mode at state 0. But on the oscilloscpe still showing a pulse but on the lower level.
Can anyone tell me why? and how to make it flat gnd if possible?, thank's
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The input pullup specs are worst case 4 Kohms. That means, worst
case, a driver must sink ~ Vddio/4K mA.
If the source Z of the 900 Hz pulse is high, then it forms
a V divider with the pullup, raising Vol as seen by pin getting
its input from the pulse generator.
One way of fixing the problem is the use a comparator on PSOC,
and uses its output, via placed buffer, to drive your input pin
with the pullup. This will consume an additional pin to allow
setting that pin to open drain low.This will result in a Vol
much closer to rail. Cost you a comparator and buffer.
Regards, Dana.
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Chnage this in prior post -
That means, worst case, a driver must sink ~ Vddio/4K mA.
to this -
That means, worst case, a driver must sink ~ Vdd/4K mA.
Regards, Dana.
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Ok, thanks