CY4C29466 voice tracking audio filter suggestions

Tip / Sign in to post questions, reply, level up, and achieve exciting badges. Know more

cross mob
Anonymous
Not applicable

Hello all,

   

I'm working on a circuit to move a mouth servo on a puppet, tracking live voice input. My current plan is to use the analog blocks to run the audio into a PGA, then through a band pass filter, and finally into an ADC. I have been using the filter wizard to set my parameters, but when I look at the output of the Band pass filter on the analog output buss, I see what looks like the signal chopped up, probably at the filter sample filter rate. Anyway, it looks like running the ADC on that signal would not give me a reliable voice amplitude.  What should I do next, and what can I provide to the community for you to look at?  Any suggestions for what I should set the parameters in the filter wizard to?

   

-Chuck

0 Likes
14 Replies
Anonymous
Not applicable

I got the part number wrong in the post title.  Should be cy8c29466

0 Likes
ETRO_SSN583
Level 9
Level 9
250 likes received 100 sign-ins 5 likes given

Pay particular attention to the column clocks in the design. If design

   

split across 2 columns you need to have same clock to each column.

   

Also there are notes in filter module datasheet about column clock

   

requirements.

   

 

   

Regards, Dana.

0 Likes
lock attach
Attachments are accessible only for community members.
Anonymous
Not applicable

I think I have the clocks set up properly. Here is a screenshot of my analog section.

0 Likes
Anonymous
Not applicable
        How was a clock setting of VC1?   
In Filter wizard, If expected characteristics was differ from nominal characteristics,   
that is no good.   
So many setting properties, you might be upload your project.   
That will be good.   
0 Likes
ETRO_SSN583
Level 9
Level 9
250 likes received 100 sign-ins 5 likes given

For a nominal 1 Khz BPF the wizard reports it wants a column clock

   

of 80 Khz, VC1 probably running too fast as it is a divider, ranging from 1 -

   

16. off CPU clock, probably too fast.

   

 

   

And the ADCINC, take a look at its clock requirements from datasheet -

   

 

   

0 Likes
lock attach
Attachments are accessible only for community members.
Anonymous
Not applicable

Thanks people.

   

Here is a stripped down version of the project. My concern at this point is the signal I see on the analog output bus. I know it is difficult to see this whitout having my hardware. My input has a small op amp, but the signal on the scope, and the output of the PGA looks like what I expect. It is just the output of the bandpass that is wrong. I provide the project so you can see my module settings.

   

 

   

-Chuck

0 Likes
lock attach
Attachments are accessible only for community members.
Anonymous
Not applicable
        :-}   
0 Likes
Anonymous
Not applicable
        Hi Chuckk   
Clock setting was wrong.   
Center frequency of filter should move relate with sampling frequency.   
BPF column clock can select VC1 or VC2.   
Beside, Column clock is sampling frequency / 4   
So selectable lowest frequency is 24000/64=375KHz   
And the sampling frequency is 93.750KHz   
That is it.   
Of course you can find other setting more suitable。   
0 Likes
Anonymous
Not applicable

Thanks you for the fast troubleshooting. I will test this out tomorrow!

   

I'm pretty good with the digital blocks. I muddle through with the analog side, and it shows.

   

 

   

-Chuck

0 Likes
Bob_Marlowe
Level 10
Level 10
First like given 50 questions asked 10 questions asked

Although your problem seems to be solved another hint:

   

The ADC-clock and filter-clock are the same in your design. I would always suggest you to use different column blocks to have the choice of independent (or better timed) clocks.

   

Elaborate: How many clock cycles does it take to get a filtered value out of the BPF

   

How many clock cycles does it take to digitize that BPF-value

   

How to set both clocks, so that the needed conversion-times are equal.

   

 

   

Bob

0 Likes
ETRO_SSN583
Level 9
Level 9
250 likes received 100 sign-ins 5 likes given

You have 2 clock requirements -

   

 

   

1) BPF, in the wizard you are given both the sampling f and the column clock f

   

(which takes into account the 4 X factor). If you lay out placement horizontally

   

you force 2 column clocks for the filter to be forced to same value, thereby

   

constraining anything else you have in the column. Like the A/D you now have

   

sharing column with one pole of the BPF. So consider a vertical route.

   

 

   

2) You have to decide what sample rate you want on ADCINC. Note there is

   

both a min and a max associated with ADCINC you have to observe.

   

 

   

Regards, Dana.

0 Likes
ETRO_SSN583
Level 9
Level 9
250 likes received 100 sign-ins 5 likes given

You have 2 clock requirements -

   

 

   

1) BPF, in the wizard you are given both the sampling f and the column clock f

   

(which takes into account the 4 X factor). If you lay out placement horizontally

   

you force 2 column clocks for the filter to be forced to same value, thereby

   

constraining anything else you have in the column. Like the A/D you now have

   

sharing column with one pole of the BPF. So consider a vertical route.

   

 

   

2) You have to decide what sample rate you want on ADCINC. Note there is

   

both a min and a max associated with ADCINC you have to observe.

   

 

   

Regards, Dana.

0 Likes
Anonymous
Not applicable
        By the way, usually I'm using PWM module to get BPF column clock.   
Because, center frequency of BPF will move relate with column clock in proportionally.   
So, I can make a tunable BPF by changing PWM period.   
   
Typo of previous post   
"sampling frequency / 4" ---> x 4   
0 Likes
ETRO_SSN583
Level 9
Level 9
250 likes received 100 sign-ins 5 likes given

Tuning via a PWM creates a constant Q filter, as opposed

   

to constatnt BW, usually desired in audio work.

   

 

   

Regards, Dana.

0 Likes