The limitations I can see are:
- current one can draw from an OpAmp (Table 8)
- SWD frequency (Table 37)
You have to read both datasheet and specific component datasheet to get insight
into V effects, Some like -
1) Noise Margin
2) GPIO Toggle rates
There are some graphs in individual component datasheets for review as well.
No doubt the rout timing is also affected as CMOS device characterisitics also
change with supply.