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Hi!
I face with some problem studying GPIF. When i initialize const char xdata WaveData[128] processor stops working.
Because of what it could be?
Regards,
Roman.
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Can you please elaborate on what you are trying to do?
Pasting your code here would help us understand the issue better.
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Hi,
When you say "initialize WaveData", are you doing that manually? You can use the GPIF designer tool, that does all the register settings related to GPIF, when you configure the GPIF waveforms appropriately from the tool. Are you already using that?
Regards,
Gayathri
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HI!
Yes, i use GPIF designer tool for that. My gpif.c in attached file, generated in GPIF designer and with my small rectification.
Regards,
Roman
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Can't attache file. Why so? Try one more time.
and my code just in case:
#include "fx2.h"
#include "fx2regs.h"
const char xdata WaveData1[128] =
{
// Wave 0
/* LenBr */ 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x07,
/* Opcode*/ 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
/* Output*/ 0x3F, 0x2F, 0x2F, 0x2F, 0x3F, 0x3F, 0x3F, 0x3F,
/* LFun */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F,
// Wave 1
/* LenBr */ 0x01, 0x01, 0x01, 0x01, 0x9C, 0x01, 0x01, 0x07,
/* Opcode*/ 0x00, 0x00, 0x02, 0x00, 0x01, 0x00, 0x00, 0x00,
/* Output*/ 0x3F, 0x1F, 0x1F, 0x1F, 0x3F, 0x3F, 0x3F, 0x3F,
/* LFun */ 0x00, 0x00, 0x00, 0x00, 0x12, 0x00, 0x00, 0x3F,
// Wave 2
/* LenBr */ 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x07,
/* Opcode*/ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* Output*/ 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
/* LFun */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F,
// Wave 3
/* LenBr */ 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x07,
/* Opcode*/ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
/* Output*/ 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
/* LFun */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F,
};
// DO NOT EDIT ...
const char xdata FlowStates[36] =
{
/* Wave 0 FlowStates */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* Wave 1 FlowStates */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* Wave 2 FlowStates */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
/* Wave 3 FlowStates */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
};
// END DO NOT EDIT
// DO NOT EDIT ...
const char xdata InitData[7] =
{
/* Regs */ 0x80,0x00,0x00,0x3F,0xEE,0x4E,0x00
};
// END DO NOT EDIT
// TO DO: You may add additional code below.
void GpifInit( void )
{
BYTE i;
GPIFABORT = 0xFF; // abort any waveforms pending
GPIFREADYCFG = InitData[ 0 ];
GPIFCTLCFG = InitData[ 1 ];
GPIFIDLECS = InitData[ 2 ];
GPIFIDLECTL = InitData[ 3 ];
GPIFWFSELECT = InitData[ 5 ];
GPIFREADYSTAT = InitData[ 6 ];
// use dual autopointer feature...
AUTOPTRSETUP = 0x07; // inc both pointers,
// ...warning: this introduces pdata hole(s)
// ...at E67B (XAUTODAT1) and E67C (XAUTODAT2)
// source
AUTOPTRH1 = MSB( &WaveData1 );
AUTOPTRL1 = LSB( &WaveData1 );
// destination
AUTOPTRH2 = 0xE4;
AUTOPTRL2 = 0x00;
// transfer
for ( i = 0x00; i < 128; i++ )
{
EXTAUTODAT2 = EXTAUTODAT1;
}
PORTCCFG = 0x00; // [7:0] as port I/O
// OEC = 0x00; // and as inputs
PORTECFG &= 0x7F; // [8] as port I/O
// OEE &= 0x7F; // and as input
SYNCDELAY; //
GPIFADRH = 0x00; // bits[7:1] always 0
SYNCDELAY; //
GPIFADRL = 0x00; // point to PERIPHERAL address 0x0000
FLOWSTATE = FlowStates[ 0 ];
FLOWLOGIC = FlowStates[ 1 ];
FLOWEQ0CTL = FlowStates[ 2 ];
FLOWEQ1CTL = FlowStates[ 3 ];
FLOWHOLDOFF = FlowStates[ 4 ];
FLOWSTB = FlowStates[ 5 ];
FLOWSTBEDGE = FlowStates[ 6 ];
FLOWSTBHPERIOD = FlowStates[ 7 ];
}
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And main.c:
#include "fx2regs.h"
#include "fx2.h"
#include "sfrs.h"
#include "exch.h"
#include "gpif.h"
BOOL Rwuen_allowed = FALSE; // Allow remote wakeup to be enabled
BOOL Rwuen = FALSE; // Remote wakeup enable
BOOL Selfpwr = FALSE; // Device is (not) self-powered
#define NUM_INTERFACES 1
BYTE Configuration; // Current device configuration
BYTE InterfaceSetting[NUM_INTERFACES]; // Current interface settings
const char code EPCS_Offset_Lookup_Table[] =
{
0, // EP1OUT
1, // EP1IN
2, // EP2OUT
2, // EP2IN
3, // EP4OUT
3, // EP4IN
4, // EP6OUT
4, // EP6IN
5, // EP8OUT
5, // EP8IN
};
#define epcs(EP) (EPCS_Offset_Lookup_Table[(EP & 0x7E) | (EP > 128)] + 0xE6A1)
#define DSCR_OFFSET(intrfc, endpnt) (sizeof(CONFIGDSCR) + \
intrfc*sizeof(INTRFCDSCR) + endpnt*sizeof(ENDPNTDSCR))
char * USB_strings[] = { "EN", "MIET", "TCE TOR" };
DEVICEDSCR xdata at 0x3d00 myDeviceDscr = {
sizeof(DEVICEDSCR), // Descriptor length
DEVICE_DSCR, // Descriptor type
0x200, // USB spec version 2.00
0, // Device class
0, // Device sub-class
0, // Device sub-sub-class
64, // Max packet size for EP0 (bytes)
0x04B4, // Vendor ID
0x8613, // Product ID
0x0100, // Product version (1.00)
1, // Manufacturer string index
2, // Product string index
0, // Serial number string index
1 // Number of configurations
};
DEVICEQUALDSCR xdata at 0x3d20 myDeviceQualDscr = {
sizeof(DEVICEQUALDSCR), // Descriptor length
DEVQUAL_DSCR, // Descriptor type
0x200, // USB spec version 2.00
0, // Device class
0, // Device sub-class
0, // Device sub-sub-class
64, // Max packet size for EP0 (bytes)
1 // Number of alternate configurations
};
CONFIGDSCR xdata at 0x3d30 myConfigDscr = {
sizeof(CONFIGDSCR), // Descriptor length
CONFIG_DSCR, // Descriptor Type
DSCR_OFFSET(1,2), // Total len of (config + intrfcs + end points)
1, // Number of interfaces supported
1, // Configuration index for SetConfiguration()
0, // Config descriptor string index
bmBUSPWR|bmRWU, // Attributes
0x1E // Max power consumption; 2*30 = 60 mA
};
INTRFCDSCR xdata at 0x3d30+DSCR_OFFSET(0,0) myIntrfcDscr = {
sizeof(INTRFCDSCR), // Descriptor length
INTRFC_DSCR, // Descriptor type
0, // Index of this interface (zero based)
0, // Value used to select alternate
2, // Number of endpoints
0xFF, // Class Code
0xFF, // Subclass Code
0xFF, // Protocol Code
0 // Index of interface string description
};
ENDPNTDSCR xdata at 0x3d30+DSCR_OFFSET(1,0) myInEndpntDscr = {
sizeof(ENDPNTDSCR), // Descriptor length
ENDPNT_DSCR, // Descriptor type
0x86, // Address of endpoint
EP_BULK, // Endpoint type
512, // Maximum packet size
0 // Interrupt polling interval
// (ignored for bulk endpoints)
};
ENDPNTDSCR xdata at 0x3d30+DSCR_OFFSET(1,1) myOutEndpntDscr = {
sizeof(ENDPNTDSCR), // Descriptor length
ENDPNT_DSCR, // Descriptor type
0x02, // Address of endpoint
EP_BULK, // Endpoint type
512, // Maximum packet size
0 // Interrupt polling interval
// (ignored for bulk endpoints)
};
static int count_array_size(void ** array)
{
int size;
for (size=0; *array != 0; array++, size++);
return size;
}
static void SetupCommand(void)
{
int i;
int interface;
switch(SETUPDAT[0] & SETUP_MASK) {
case SETUP_STANDARD_REQUEST:
switch(SETUPDAT[1]){
case SC_GET_DESCRIPTOR:
switch(SETUPDAT[3]){
case GD_DEVICE:
SUDPTRH = MSB(&myDeviceDscr);
SUDPTRL = LSB(&myDeviceDscr);
break;
case GD_DEVICE_QUALIFIER:
SUDPTRH = MSB(&myDeviceQualDscr);
SUDPTRL = LSB(&myDeviceQualDscr);
break;
case GD_CONFIGURATION:
myConfigDscr.type = CONFIG_DSCR;
if (USBCS & bmHSM) {
// High speed parameters
myInEndpntDscr.mp = 512;
myOutEndpntDscr.mp = 512;
}
else {
// Full speed parameters
myInEndpntDscr.mp = 64;
myOutEndpntDscr.mp = 64;
}
SUDPTRH = MSB(&myConfigDscr);
SUDPTRL = LSB(&myConfigDscr);
break;
case GD_OTHER_SPEED_CONFIGURATION:
myConfigDscr.type = OTHERSPEED_DSCR;
if (USBCS & bmHSM) {
myInEndpntDscr.mp = 64;
myOutEndpntDscr.mp = 64;
}
else {
myInEndpntDscr.mp = 512;
myOutEndpntDscr.mp = 512;
}
SUDPTRH = MSB(&myConfigDscr);
SUDPTRL = LSB(&myConfigDscr);
break;
case GD_STRING:
if (SETUPDAT[2] >= count_array_size((void **) USB_strings)) {
EZUSB_STALL_EP0();
}
else {
for (i=0; i<31; i++) {
if (USB_strings[SETUPDAT[2]] == '\0') break;
EP0BUF[2*i+2] = USB_strings[SETUPDAT[2]];
EP0BUF[2*i+3] = '\0';
}
EP0BUF[0] = 2*i+2;
EP0BUF[1] = STRING_DSCR;
SYNCDELAY; EP0BCH = 0;
SYNCDELAY; EP0BCL = 2*i+2;
}
break;
default: // Invalid request
EZUSB_STALL_EP0();
}
break;
case SC_GET_INTERFACE:
interface = SETUPDAT[4];
if (interface < NUM_INTERFACES) {
EP0BUF[0] = InterfaceSetting[interface];
EP0BCH = 0;
EP0BCL = 1;
}
break;
case SC_SET_INTERFACE:
interface = SETUPDAT[4];
if (interface < NUM_INTERFACES) {
InterfaceSetting[interface] = SETUPDAT[2];
}
break;
case SC_SET_CONFIGURATION:
Configuration = SETUPDAT[2];
break;
case SC_GET_CONFIGURATION:
EP0BUF[0] = Configuration;
EP0BCH = 0;
EP0BCL = 1;
break;
case SC_GET_STATUS:
switch(SETUPDAT[0]) {
case GS_DEVICE:
EP0BUF[0] = ((BYTE)Rwuen << 1) | (BYTE)Selfpwr;
EP0BUF[1] = 0;
EP0BCH = 0;
EP0BCL = 2;
break;
case GS_INTERFACE:
EP0BUF[0] = 0;
EP0BUF[1] = 0;
EP0BCH = 0;
EP0BCL = 2;
break;
case GS_ENDPOINT:
EP0BUF[0] = *(BYTE xdata *) epcs(SETUPDAT[4]) & bmEPSTALL;
EP0BUF[1] = 0;
EP0BCH = 0;
EP0BCL = 2;
break;
default: // Invalid Command
EZUSB_STALL_EP0();
}
break;
case SC_CLEAR_FEATURE:
switch(SETUPDAT[0]) {
case FT_DEVICE:
if(SETUPDAT[2] == 1)
Rwuen = FALSE; // Disable Remote Wakeup
else
EZUSB_STALL_EP0();
break;
case FT_ENDPOINT:
if(SETUPDAT[2] == 0) {
*(BYTE xdata *) epcs(SETUPDAT[4]) &= ~bmEPSTALL;
EZUSB_RESET_DATA_TOGGLE( SETUPDAT[4] );
}
else
EZUSB_STALL_EP0();
break;
}
break;
case SC_SET_FEATURE:
switch(SETUPDAT[0]) {
case FT_DEVICE:
if((SETUPDAT[2] == 1) && Rwuen_allowed)
Rwuen = TRUE; // Enable Remote Wakeup
else if(SETUPDAT[2] == 2)
break;
else
EZUSB_STALL_EP0();
break;
case FT_ENDPOINT:
*(BYTE xdata *) epcs(SETUPDAT[4]) |= bmEPSTALL;
break;
default:
EZUSB_STALL_EP0();
}
break;
default: // *** Invalid Command
EZUSB_STALL_EP0();
break;
}
break;
default:
EZUSB_STALL_EP0();
break;
}
EP0CS |= bmHSNAK;
}
void Initialize(void);
static void USB_isr(void) __interrupt 8
{
EXIF &= ~0x10;
USBIRQ = 0x01;
SetupCommand();
}
static void Initialize(void)
{
CPUCS=0x10; // 48 MHz, CLKOUT output disabled.
IFCONFIG=0xca; // Internal IFCLK, 48MHz; A,B as normal ports.
SYNCDELAY;
REVCTL=0x03; // See TRM...
SYNCDELAY;
EP1OUTCFG=0;
EP1INCFG=0;
EP4CFG=0;
EP8CFG=0;
// Set up EP2 and EP6 as quad-buffered, 512 bytes per buffer, bulk.
EP6CFG=0xe2; // 1110 0010 (IN)
EP2CFG=0xa0; // 1010 0000 (OUT)
FIFORESET = 0x80; SYNCDELAY; // NAK all requests from host.
FIFORESET = 0x82; SYNCDELAY; // Reset individual EP (2,4,6,8)
FIFORESET = 0x84; SYNCDELAY;
FIFORESET = 0x86; SYNCDELAY;
FIFORESET = 0x88; SYNCDELAY;
FIFORESET = 0x80; SYNCDELAY; // NAK all requests from host.
FIFORESET = 0x00; SYNCDELAY; // Resume normal operation.
OUTPKTEND = 0x82; SYNCDELAY;
OUTPKTEND = 0x82; SYNCDELAY;
OUTPKTEND = 0x82; SYNCDELAY;
INPKTEND = 0x86; SYNCDELAY;
INPKTEND = 0x86; SYNCDELAY;
INPKTEND = 0x86; SYNCDELAY;
EP2FIFOCFG = 1; SYNCDELAY;
EP6FIFOCFG = 1; SYNCDELAY;
SUDPTRCTL = 1;
}
void timer2_ISR (void) interrupt 5
{
T2CON &= ~TF2;
}
void main(void)
{
unsigned long blink_counter;
Initialize();
/* GpifInit(); */
IE = 0x00; // Disable all interrupts
IE |= EA; // Global interrupt enable
// Enable USB interrupt
EIE = 0x00; // Disable external interrupts
EIE |= EUSB; // Enable USB Interrupt
// IE |= ES0; // Enable Serial port 0 interrupt
// IE |= ES1; // Enable Serial port 1 interrupt
USBIE = 0x00; // Disable usb interrupts
USBIE |= SUDAV; // clear the interrupt request
USBCS |= RENUM; // Renumber
USBCS &= ~DISCON; // Connect to USB bus
/* CKCON |= T0M; // divide system clock by 4 for timer 0 */
CKCON |= T2M; // divide system clock by 4 for timer 2
/* TMOD &= ~M01; // Set Timer 0 mode select bit 1
TMOD |= M00; // Set Timer 0 mode select bit 0 ('01' = mode1 - 16 bit counter)
IE |= ET0; // T0 interrupt enable */
IE |= ET2; // T2 interrupt enable
/* TCON |= TR0; // Disable counting at Timer0 */
T2CON &= ~TR2; // Disable counting at Timer2
RCAP2L = T2ARRL;
RCAP2H = T2ARRH;
OEA |= OUT_A; // Enable output registers
IOA &= ~OUT_A; // Set to zero output registers
OEA &= ~INP_A; // Enable input registers
IOA |= CS; //CS set high
OEC |= OUT_C; // Enable output registers
IOC &= ~OUT_C; // Set to zero output registers
OEE |= OUT_E; // Enable output registers
IOE &= ~OUT_E; // Set to zero output registers
IOA &= ~LIGHT3; // Enable light
IOA |= LIGHT2; // Disable light
IOA |= LIGHT1; // Disable light
IOA |= LIGHT0; // Disable light
blink_counter = 0;
for(;;)
{
blink_counter += 1;
if (blink_counter > 20000)
{
blink_counter = 0;
IOA ^= LIGHT2;
}
}
}
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Hi,
It would be easier to support you if you can create tech support case at www.cypress.com -> Technical Support -> Create a case; and attach the project files over there, so that we can replicate the issue and work on that.
regards,
Gayathri
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Ok, i'll do it.
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Hi,
Same update. I thought that problem been solved, but it was not) Question is still open. My gues that Wavedata loaded in internal RAM (wich is only 256 bytes), instead of External RAM. Is it possible? If yes, how to relocate Wavedata into External RAM. May be compiler affects on this, i use sdcc 2.9.0.
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Well, problem solved. There was two errors:
first: need to separate code memory and xram memory location in compiler options.
second: problem with WaveData[] variable. In Data Sheet is writen Wavedata[128] (in .c file generated from GPIF Designer Wavedata[128] ) . But in fx2regs.h it is declared like EXTERN xdata _AT_(0xE400) volatile BYTE GPIF_WAVE_DATA .
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