- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi, i cant find a note about the impedance of an analog, high z GPIO in the datasheet . Can anyone tell me that? Even in the OPamp datasheet is no info. thanks a lot
- Labels:
-
PSoC 3
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
High-Z means 'high input impedance'. That in turn means that the inputs don't put a load on the output / circuit they are connected to.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Thanks for the answer but i mean a value for the impedance, how many ohms?
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Look into the PSoC3 Family Datasheet to be found here: www.cypress.com/.
On page 75 (english version) you find IIL given as 2nA maximum @ 3V from which you may calculate the input impedance using Ohm's law.
Bob
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Okay. Thank you
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi Z is a state of all drivers on pin turned off, such that all that remains
is leakage current of the input protection diodes, and the leakage of the
N & P mosfets turned off.
Keep in mind this leakage is a strong function of temp, so spec in datasheet
is just a limiting value at room temp. If you are driving external MOSFET gates
or Bipolar base connections, you need a R to gnd for MOSFET, or R to emitter for
Bipolar to absorb worst case leakage to keep external device from turning on when
a pin is tri-stated. R is computed from worst case leakage and thereshold for external
device.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
One correction, in case of MOSFET, R connections Gate to Source
for enhancement mode devices.
Regards, Dana.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
@Dana regarding leakage current and temperature: Datasheet says
Specifications are valid for –40°C
≤ T A ≤ 85°C and T J ≤ 100°CBob
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
@Bob, from datasheet, 25 C value (and a note its a characterization spec not a tested
spec) -
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Oops, I just stuck to the hedline and didn't look for the fine print.
Bob
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Bob, and others:
It's a little more subtle than that.
The input leakage is a current spec, it can leak to either rail, that's why it's absolute value. The nature of the current is to double every 10 deg C, and it's speced at the limit temperature, TJ= 100 C. Again, it's a current, not a resistance to Vss or Vdd.
There is a difference between "high-Z" and "high-Z analog." "High-Z" is a digital input, it has a small amount of hysteresis (~50 mV) on the digital threshold to prevent noise problems. The hysteresis causes a little bit of charge kick-back to the input pin at the transition. "High-Z analog" disables the hysteresis to yield cleaner ANALOG input waveforms in the case of a high source impedance. This is long standing PSoC practice, goes back to the first chips shipped in 2001.
---- Dennis Seguine
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
@Seg, I understand the doubling every 10 C, classic diode behaviour, but what
about MOSFET leakage which does not follow that behaviour ? Does diode leakage
dominate or Igss and Idsoff in the N and P FETs ?
Regards, Dana.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
@set. Thanks for information about the effects of the hysterisis of the digital input.