at present there is no simulator available. It is one of the high priority items on the roadmap and at the same time it is a major task. You have to bare with us with the simulator.
We hope to bridge the gap with our evaluation kits to use hardware instead of simulator. I know it is not the same but very helpful nonetheless
Thanks for the reply. I am very happy to know that it's on the roadmap, and I appreciate that it's a massive task. I look forward to it.
There is no Simulator available with Creator. The major challenge is that the analog components which form an integral part of a given project such as Trans-Impedance Amplifiers (TIA), PGAs, Comparators, Mixers, VDAC and IDACs cannot be simulated in software.
However, it can be emulated in hardware in Debug mode. What you need for this is a PSoC3/5 Kit.
If you are intending to simulate the Custom component you have created using Verilog, then you can write a test bench and test on any standard Verilog simulator such as ICARUS or ModelSim. Just make sure that the syntax follows the standard Verilog.
This is directed at Cypress:
If simulating the analog part of a project is "holding up" a full system simulator - It seems to me it would be very useful to just allow "low impedance" node drives with "test signals" so the (digital) balance of the system can be "wrung out". Analog simulation is dicey anyway - (don't trust the sims).
In a system which samples the analog voltage at a point, and DMA's it to USB (like a system I've been working on), the analog voltage could be "presented (in simulation) to the convertor" input via a (defined versus time) table of numbers (for a periodic signal). This would allow debug of the digital system without the (somewhat limited) harware debugger.
I need to debug some 1000+ lines of C8Y 8-bit assembly, which calculates some numbers. No modules of any kind. A software simulator would be fine for this. Even more so, as we have all pods out on a project, so I cannot run a single line of code.
For complex real-time synchronization, where the CPU run a calculation synchronised with some analogue module, a software simulation of the calculation routine, with an exact count on consumed CPU cycles would be very helpful. Even if the routine run on example numbers only, without any real input, this is still helpful as the synchronisation and algorithms can be checked.
The operation of digital modules can likely benefit form a simulator with focus on synchronisation and time delays. This can be added (or a separate application) at a later time.
The operation of the analogue modules likely need a simulator of the analogue signals, sampling, amplification, and other key parameters, and this is also best implemented separately.
we build encryption units and true random number generators using the PSoC.