Anonymous
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Sep 03, 2014
06:38 AM
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Sep 03, 2014
06:38 AM
Hi all
Simple question - 48 MHz is maximal clock frequency for UDB ?
Thanks info
Kamil
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PSoC 5LP
7 Replies
Sep 03, 2014
08:25 AM
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Sep 03, 2014
08:25 AM
No, the UDB can also be clocked with the maximum bus clock. But depending on how you configure it, the maximum frequency can be slower (e.g. for the counters it depends on the bit depth).
Anonymous
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Sep 03, 2014
09:51 AM
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Sep 03, 2014
09:51 AM
Thanks info
Max bus frequency is same like arm core frequency 67 MHz ?
My idea is very simple verilog VGA controller.
Kamil
Sep 03, 2014
09:58 AM
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Sep 03, 2014
09:58 AM
The Creator timing analyzer will flag you if you have a
problem with routes/timing.
Regards, Dana.
Sep 03, 2014
10:03 AM
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Sep 03, 2014
10:03 AM
Depending on the chip you use the max. Frequency is 80MHz
Bob
Sep 03, 2014
03:03 PM
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Sep 03, 2014
03:03 PM
80.01 Mhz.
Regards, Dana.
Sep 04, 2014
03:14 AM
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Sep 04, 2014
03:14 AM
I raise to 80.02 MHz 🙂 (probably needs hydrogen cooling)
Anonymous
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Sep 04, 2014
03:56 AM
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Sep 04, 2014
03:56 AM
Thanks help all
My VGA project working fine - 50MHz PLL and about 20% UDB resorces 🙂
Kamil