SPI Sniffering 80bits data length, SPI of more than 16 bits length

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Anonymous
Not applicable

 Hello, I'm implementing an SPI Sniffer that should be able to read SPI data frames of 80 bits( in a single SS pulse), the question I have is if the SPI Slave component can be chainned to another SPI Slave so I can  for example use 5 Slave components configured at 16bits.

   

Is this poissible?

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HeLi_263931
Level 8
Level 8
100 solutions authored 50 solutions authored 25 solutions authored

I don't think thats possible. But you can use DMA to move the data thats received by the SPI to a memory buffer. For that, configure the SPI for 8 bit and have it create an DMA request for each byte received (by using the interrupt output).

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Anonymous
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 Hello I used the Sample Cypress code to use the Slave, I'm able to read SPI but the problem is  htat the SPI Slave only reads one time, wht is wrong in the Code?

   

Regards

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Anonymous
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 The 8 bytes of the  s_rxBuffer are updated with SPI Data, bust it just hapen once, s there a need to crelar the SPI/DMA Buffer to be able to read teh rest of the data?

   

 Regards

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HeLi_263931
Level 8
Level 8
100 solutions authored 50 solutions authored 25 solutions authored

Looking just at the read-DMA: the first TD reads 8 bytes, 1 byte per burst, and increments the target address. Thats fine. The second TD though transfers just a single byte, and then loops to itself. That way it will just copy the first byte of the RX buffer onto itself, and repeats this every time.

   

What you probably want to do: signal the end of the first TD from the DMA and trigger an ISR from there. In this ISR you can re-configure the TD and restart the DMA. It might be useful to use two RX buffers, and signal the main loop that one of them is full (currently your main loop actually never knows when the DMA has finished, you hope that this happens when your SPI send is done, but thats not guaranteed).

   

Regarding the SPI send: when the SPI clock is too fast, the DMA might not supply bytes to the TX buffer fast enough, which means the transfer is thought as finished even though its not. It might be better to wait for the TX DMA to finish, and then check the SPI status.

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