Build a custom component with internal interrupts

There is always the method to create internal to component

an output that contains your desired logic, then external to

component attach ISR component to that output.

Regards, Dana.

You may convert a complete schematic into a macro. When you additionally provide the APIs as .h and .c-files it may be manageable (although I've not done that yet).

Bob

What problem are you having?

I've done many ccomponents with isr and even dma inside. For just the reasons you gave. ISR and DMA dependent code lives in and is customized to the component. 

Don't forget to prefix all of the internals with the instance name tag. I use it so much it is setup as ctrl-shift-i in my macro keyboard program.

Ed

I'm not sure what you're meaning. I do the ISR code inside the component.

here is a snippet, attached is a png of the component schematic.

//=====================================================================
//
//    `$INSTANCE_NAME`.c - component c code
//
//=====================================================================

#include "`$INSTANCE_NAME`.h"

PORT_CONTROL    *`$INSTANCE_NAME`_pcPtr[PARAM_PORT_SFX_CNT];

CY_ISR_PROTO(`$INSTANCE_NAME`_ISR_A_ISR);
CY_ISR_PROTO(`$INSTANCE_NAME`_ISR_B_ISR);

//---------------------------------------------------------------------
//
//    `$INSTANCE_NAME`_Start() - start function
//
//---------------------------------------------------------------------

void `$INSTANCE_NAME`_Start(void *control)
{
    uint8                    sfxIdx;
    register PORT_CONTROL    *pcPtr;
   
    pcPtr = control;
   
    if (pcPtr->portConfig[0].actMode == 'Y')
    {
        sfxIdx = pcPtr->portConfig[0].sfx - 'A';
       
        `$INSTANCE_NAME`_pcPtr[sfxIdx] = pcPtr;
       
        switch(sfxIdx)
        {
        case 0:
            J1_REG8(`$INSTANCE_NAME`_PixA_BitCount__CONTROL_AUX_CTL_REG) |= 0x20;
   
            `$INSTANCE_NAME`_ISR_A_StartEx(&`$INSTANCE_NAME`_ISR_A_ISR);

            pcPtr->DMA_Chan        = `$INSTANCE_NAME`_DMA_A_DmaInitialize(1,1,HI16(CYDEV_SRAM_BASE),HI16(CYDEV_PERIPH_BASE));
            pcPtr->DMA_TDs[0]    = CyDmaTdAllocate();
            CyDmaTdSetConfiguration(pcPtr->DMA_TDs[0],pcPtr->outBfrByteCnt,DMA_DISABLE_TD,TD_INC_SRC_ADR);
            CyDmaTdSetAddress(pcPtr->DMA_TDs[0], LO16((uint32) (pcPtr->output[0].outBfrPtr)), LO16((uint32) `$INSTANCE_NAME`_PixA_pixel_u0__F0_REG));
            CyDmaChSetInitialTd(pcPtr->DMA_Chan, pcPtr->DMA_TDs[0]);
            break;
           
        case 1:
            J1_REG8(`$INSTANCE_NAME`_PixB_BitCount__CONTROL_AUX_CTL_REG) |= 0x20;
   
            `$INSTANCE_NAME`_ISR_B_StartEx(&`$INSTANCE_NAME`_ISR_B_ISR);

            pcPtr->DMA_Chan        = `$INSTANCE_NAME`_DMA_B_DmaInitialize(1,1,HI16(CYDEV_SRAM_BASE),HI16(CYDEV_PERIPH_BASE));
            pcPtr->DMA_TDs[0]    = CyDmaTdAllocate();
            CyDmaTdSetConfiguration(pcPtr->DMA_TDs[0],pcPtr->outBfrByteCnt,DMA_DISABLE_TD,TD_INC_SRC_ADR);
            CyDmaTdSetAddress(pcPtr->DMA_TDs[0], LO16((uint32) (pcPtr->output[0].outBfrPtr)), LO16((uint32) `$INSTANCE_NAME`_PixB_pixel_u0__F0_REG));
            CyDmaChSetInitialTd(pcPtr->DMA_Chan, pcPtr->DMA_TDs[0]);
            break;
        }
       
        switch(pcPtr->portConfig[0].type)
        {
        case PT_DMX:
        case PT_REN:
            `$INSTANCE_NAME`_Ctrl_Control = 0b1111;
            break;
           
        case PT_LPD6803:
        case PT_WS2801:
            `$INSTANCE_NAME`_Ctrl_Control = 0b1001;
            `$INSTANCE_NAME`_Clock_SetDivider(BCLK__BUS_CLK__HZ / ( 2000ul * (uint32) pcPtr->portConfig[0].speed));
            break;
           
        case PT_TM180X:
            `$INSTANCE_NAME`_Ctrl_Control = 0b1010;
            `$INSTANCE_NAME`_Clock_SetDivider(BCLK__BUS_CLK__HZ / ( 6000ul * (uint32) pcPtr->portConfig[0].speed));
            break;
           
        case PT_TLS3001:
            `$INSTANCE_NAME`_Ctrl_Control = 0b1111;
            break;
           
        case PT_WS281X:
            `$INSTANCE_NAME`_Ctrl_Control = 0b1100;
            `$INSTANCE_NAME`_Clock_SetDivider(BCLK__BUS_CLK__HZ / (10000ul * (uint32) pcPtr->portConfig[0].speed));
            break;
       
        default:
            break;
        }
    }
}

//---------------------------------------------------------------------
//
//    `$INSTANCE_NAME`_ISR_A_ISR() - the ISR for the idle
//
//---------------------------------------------------------------------

CY_ISR(`$INSTANCE_NAME`_ISR_A_ISR)
{
    `$INSTANCE_NAME`_ISR_A_ClearPending();
    `$INSTANCE_NAME`_pcPtr[0]->portState    = PORT_STATE_DONE;
}

//---------------------------------------------------------------------
//
//    `$INSTANCE_NAME`_ISR_B_ISR() - the ISR for the idle
//
//---------------------------------------------------------------------

CY_ISR(`$INSTANCE_NAME`_ISR_B_ISR)
{
    `$INSTANCE_NAME`_ISR_B_ClearPending();
    `$INSTANCE_NAME`_pcPtr[1]->portState    = PORT_STATE_DONE;
}