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I have a project for 5LP target.
I need to generate 125 kHz square wave alternating signal on H Bridge. The interrupts have been disabled to ensure they do not interfere with timing. For the test cose snippet below, PMOS1 and PMOS2 are ON for 1.575us while NMOS1 and NMOS2 are on for 3.5us. I cannot understand why they are not symmetrical as the hardware pins are all set up the same on the schematic. I am expecting each sugnal to be ON for same amount of time. Thanks (the infinite loop is for testing, this will cycle a certain number of times in finished code).
void Carrier_ON(void)
{
for(;;)
{
PMOS2_DR &= ~PMOS2_MASK; //0
NMOS1_DR |= NMOS1_MASK; //1
PMOS1_DR |= PMOS1_MASK; //1
NMOS2_DR &= ~NMOS2_MASK; //0
asm("NOP");asm("NOP");asm("NOP");asm("NOP");
asm("NOP");asm("NOP");asm("NOP");asm("NOP");
asm("NOP");asm("NOP");asm("NOP");asm("NOP");
asm("NOP");asm("NOP");asm("NOP");asm("NOP");
PMOS1_DR &= ~PMOS1_MASK; //0
NMOS2_DR |= NMOS2_MASK; //1
PMOS2_DR |= PMOS2_MASK; //1
NMOS1_DR &= ~NMOS1_MASK; //0
asm("NOP");asm("NOP");asm("NOP");asm("NOP");
asm("NOP");asm("NOP");asm("NOP");asm("NOP");
asm("NOP");asm("NOP");asm("NOP");asm("NOP");
asm("NOP");asm("NOP");asm("NOP");asm("NOP");
}
}
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PSoC 5LP
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Just out of curiosity why are you not using PWM set up with
deadband. There you can set deadband in terms of # clocks,
so quite predictable.
Regards, Dana.
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Thanks Dana, can you please explain how I set up the 4 PWM signals.
There must be no cross-conduction between PMOS and NMOS on either side of the bridge and we need to machester enclode the carrier with 62 cycle bits (1000 Baud).
I just wasn't sure how to set this up and assumed I needed to bit-bash, but an thankfull you have a better method.
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Dana,
When you use the deadband, do you get PH1 at PWM1 output and PH1 and PWM2?
Would I need to take each output through an inverter with Enable function to ensure I can drive the other half of the bridge and then switch all off when I want to stop?
Or, can we use a LUT somehow?
I just need to switch OFF PMOS1 and NMOS2 before switching on PMOS2 and NMOS1.
Then visa versa for other half of the cycle. (Ensuring PMOS1/NMOS1 never turn on together and PMOS2/NMOS2 never turn on together). Each half of the bridge needs to be on for 4us to generate the 125 kHz.
There must be an OFF state where no current flows through the bridge.
Then my code could toggle the KILL? on and off at the Baud Rate (500uS bit time).
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I have attached the schematic of PWM to drive H-Bridge to check if this is feasible.
As the PH1 output is shorter than the PH2 output, I can use the delay to ensure either NMOS of PMOS is switched off before other one is switched on. I am using TC4426A that invert the inputs so a "1" turns ON the PMOS and a "0" turns on the NMOS.
It looks like it should work as long as I can assure both PH1 and PH2 can be set to 0 at the same time to switch it off.
I assume the Kill will operate very quickly (end of current cycle) and set all outputs to zero.
This will save a lot of mucking around in code because I can simply manipulate the Kill function to ASK modulate the waveform.
Thanks.
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Sorry I missed your earlier posts. At the most basic level the
H bridge is connected to the PWM as shown below. Note additional
gating would be needed, unless included in H Bridge driver, to do
braking, etc.. Its also assumed that if H Bridge is MOSFET based
the bridge itslef has incldued Gate boost circuitry, primarily for the
PMOSFETs.
The PWM set up for deadtime takes care of the simultaneous switch
on problem in the leg of the bridge, eg. both switches in a leg on at
same time.
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Regarding kill operation, from datasheet -