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Just cranking on the default example included with the EZ-USB FX3 SDK for the slfifosync example. There is a flag in the cyfxslfifosync.h file, CY_FX_SLFIFO_GPIF_16_32BIT_CONF_SELECT, which looks like it ought to work. When I generate config files from the GPIF II Designer, the output files look like they match what would be selected based on that flag value.
I get it to work in 16 bit mode, the default for the example, but switching that flag to 1, setting it up for 32 bit mode, I don't get any data on the host side. Advice?
-CL
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What do the flags show? Do they go high on bootup?
And is the FPGA sending out data?
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Thank you for responding,
In 32-bit mode, flags A & B are low at boot, and stay low.
When I run it in 16-bit mode, flags A & B are low at boot, and then as I transmit data they go high, and for every chunk of data or so they go low then high again. When I quit transmitting data (ie quit transitioning PCLK), they stay high.
When I jump to 32-bit mode (change the 16/32 bit flag value), I'm doing the same thing as with 16-bit, ie putting data on the data pins and clocking PCLK, exact same way, but nothing happens. The flags stay low permanently.
-CL