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At the bottom of page 24 of the app note there is explanation for what each of these functions are meant to do
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Hi,
I already studied the description at the bottom of page 24 but it confuses me so that is why I am asking for help.
So please confirm me if I am right: IORD_REG16() and IOWR_REG16() functions read from and write to specified register a 16 bit word in a sequence that is shown at page 6 in document "AN73304-ADMuxBoot".
But what does IORD_SCK16() and IOWR_SCK16() functions do? Does they write and read in same sequence like IORD_REG16() and IOWR_REG16()? But from what address?
Thank you for answers,
Rok
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Thank you very much for explanation.
Best regards, Rok
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Hi,
I'm trying to boot FX3 via Sync ADMUX interface but with no success.
First, I have a question about PMODE pins. PMODE pins should be F00, so if I set jumpers J96(2-3), J97(2-3) and J98(open), is this correct for Sync ADMUX boot? All four SW25 switches are all ON.
My second question is about start sequence. I reffered to AN73305-ADMuxBoot where it says that at startup I you should keep polling PP_IDENTIFY register. Which register is this? I cannot find this register in FX3 Programmers Manual. Also there is no PP_IDENTIFY register in example firmware download code so what should I do about it?
Can somebody please help me about this problems?
Thanks for replies.
Regards,
Rok
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2 RokV
Do you succeed with booting FX3 via GPIF 2 ?
I also planing this way of BOOT, but it looks like not completely verified..
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I'm also trying to use ADMUX boot on some new prototypes and am having some problems.
My observations are that the register addresses given an Programmers manual table 10-1 are all in error by a factor of 4, with respect to the ADMUX bus signals.
eg. Bus Transactrion with Address = 0x82 (Register = 0x02) accesses PP_CONFIG (0x08)
Also the control signal mapping/polarity appear to be different to what I was sent.
I have a web case open on this.
I'll be interested If you are able to read the PP_CONFIG register successfully (I'm never seeing the CFGMODE bit set)
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For those who are interested we have now got our board booting via the ADMUX interface.
There are a few errors/omisisons in the AN76405 documentation - I hope this will now be updated.
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Hi,ColinSpry
I'm trying to boot FX3 via Sync ADMUX interface but with no success.
Can you tell me what 's the errors/omisisons in the AN76405 documentation? Can you tell me how you achieve it ?
Thank you for answers,
Best regards,
Puck
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The AN76405 doc has been updated since the last post on this thread. Have you taken a look at it: http://www.cypress.com/?rID=63358
Can you give some detail on where you are stuck?
Are you checking the PP_IDENTIFY / RD_MAILBOX registers after a 1ms delay after reset?
Or do you see an issue with a command/data read/write?
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Hi, PRAG
I have read PP_IDENTIFY / RD_MAILBOX registers, 0x81 and 0x42575943 is been reading back. NOW, read / write register success. but read / write socket have problem .When writing the command('C' 'Y' 0X02 0X01) one time or two times , the PP_SOCK_STAT_L register always is 1.I should wirting the command('C' 'Y' 0X02 0X01) three times , the PP_SOCK_STAT_L register is 5 .When reading the response through the socket 2 one time , the result is 0x0.
When reading the response through the socket 2 twice , the result is 'W' 'B', 0x01 0x02 . As far as i know , the right response is ‘W' 'B' 0x* 0x0.
Thank you for answers,
Best regards,
pcuk