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Hello all,
I have specified the following circuit (see image attached) in PSoC Creator. I have selected a PSoC 3 device (CY8C3866AXI-040).
I wonder if someone at the forum can help me answering some questions:
(1) What's wrong with this circuit?
(2) Why can I not use resitors freely in combination with the provided op-amps in a PSoC device?
(3) Are the op-amp components using a positve and negative power supply, e.g. +VSS and -VSS by default?
(4) What does the: "Opamp_1.Vminus" connected to signal "Net_13" have mismatching types. Error message mean?
If anyone has any suggestions on the correct way to implement this circuit in PSoC please let me know, any information would be greatly appreciated,
Thanks,
Antonio.
Solved! Go to Solution.
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Hi Antonio,
Here are some important points to be highlighted with regard to the design you have specified:
- If you want to build any circuit using the opamp with external passive components such as resistors, capacitors, etc; the inverting, non-inverting and output terminals should be brought out via analog pins. The pins are not required only if the connections are to be done internally to PSoC.
- When using opamp in voltage follower mode, there is an option to do so internally. There is no need to bring the terminals out on pins and then shorting externally. This will save two pins and also eliminate the path resistance involved in bringing the terminals out via analog pins.
- When Vref is to be brought out externally, then it is mandatory to buffer it. Hence, an opamp in voltage follower mode will be consumed in this process. If Vref is to be used internally, there is no need to buffer it.
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Hi Antonio,
Here are some important points to be highlighted with regard to the design you have specified:
- If you want to build any circuit using the opamp with external passive components such as resistors, capacitors, etc; the inverting, non-inverting and output terminals should be brought out via analog pins. The pins are not required only if the connections are to be done internally to PSoC.
- When using opamp in voltage follower mode, there is an option to do so internally. There is no need to bring the terminals out on pins and then shorting externally. This will save two pins and also eliminate the path resistance involved in bringing the terminals out via analog pins.
- When Vref is to be brought out externally, then it is mandatory to buffer it. Hence, an opamp in voltage follower mode will be consumed in this process. If Vref is to be used internally, there is no need to buffer it.
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The opamps in PSoC 3 has direect connections to dedicated pins.
For example:
- opamp0 = P0[1]
- opamp1 = P3[6]
- opamp2 = P0[0]
- opamp3 = P3[7]
If you assign these as output pins, then the design will be optimized. You can refer to the Technical Reference Manual for more details on the analog routing. The diagram below shows the direct connections of the Opamps.
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I am sorry, the image was not pasted in the previous post. I am attaching the image of opamp analog routing.
The snap-shot of the modified project is also attached.
In the Pins section of the .cydwr file, choose the output pins from amongst P0[0], P0[1]. P3[6] and P3[7].
The ground at the non-inverting input terminal of Opamp_1 can be selected as Internal by using Internal Vref configured as Vssa (GND); or Externally grounding it by connecting an analog pin to it.
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Thanks for the info dasq.
I think for my circuit it will be better to route things internally using the op-amp in follower mode.
I still have a question regarding the power supply for the op-amps. Are the op-amps in PSoC 3 single power supply or dual power supply?
Cheers,
Antonio.
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Hi Antonio,
The opamps used in PSoC are powered using single power supply.
The minimum voltage possible cannot be less than ground (Vss = 0V).
The peak to peak voltage of the input signal should be within the Vdd - Vss supply range. If the output voltage of an opamp tends to go beyond this range, then the waveform gets clipped.
If you are intending to use a varying signal, then make sure that the analog ground (Vssa) is between Vdd and ground so that the signal is not clipped.
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how to make analog ground in between vdd and vss ?
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Some ways to make an artificial analog ground -
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Here is a method to bias both inputs to mid supply and AC couple input -
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HI,
Do the Op-amp can suddenly malfunction?
I used an amplification design and yesterday it stops working properly .
One of the Op-amp (3) output was "jumped" to swing around 5V instead of 2.5V. No changes made.
The total output backs to swing around 2.5 V but still there is some problem with the voltage bias .....
What it can be? Did someone met this problem?
Thanks!!
Anna
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Any signal into PSOC must meet the following
Vdda >= Vsignalin >= Vssa.
Are you meeting that ?
Regards, Dana.