- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
This may be a really stupid question, but here goes:
Is there any way a new DAC component could be developed that would be accessible thru the hardware for PSOC4?
So you could attach the DAC inputs to a counter or LUT to generate waveforms independent of the processor?
I am hoping for some deep insight from the Verilog jockeys out there.
Thanks,
Bill
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
The underlying hardware for the IDACs a PSoC4 has got is controlled by registers which can only be accessed by the CPU. So there is probably no way to change the IDAC input using hardware only.
The PSoC3/5 have got DMA capabilities, here the registers can be changed through a different path. Additionally there is a DAC-Bus that connects to signals fed into the DAC which can be connected to a counter.
Bob
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Using an interrupt one can feed a table of samples to IDAC w/o
program intervention. So effectively a psuedo HW solution. That
approach is a very standard way of waveform creation. You could
also do it with a polynomial generating samples.
Some questions -
1) Range of frequencies you want to generate ?
2) Resolution of frequency generated ?
3) Absolute accuracy of frequency generated ?
4) Table size of waveform samples ?
5) Harmonic response of waveform generated (thinking sine) ?
6) Type of waveform, square, sine, ramp, tri, saw..... ?
Note PSOC 4 has a HW multiplier, could be used in poly generation
or filtering.
Regards, Dana.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Thank you Bob and Dana. I spent a little time with the PSOC4 architecture guide and came to the same conclusion as Bob (about the ability to access the CSD_IDAC register).
I had seen another thread that Dana (or both of you) had contributed to talking about the IIR technique, PWM, sine table look up, etc. I was just looking for a way around having the processor being involved... there is that nice little LUT in hardware and counters. It just seems a shame the DAC can't be connected to them.
THANK YOU!
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
The PSoC4 is a generally reduced version of the original PSoC idea. This you may see when comparing the price of each: last year there was a promotion campaign selling a PSoC4245 for just $1. So it is quite obvious that the PSoC4 is designed for the mass-markets wasting the fewest amount of costly resources within the chip.
Again: If you are in need of a hardware-only solution feeding a DAC's input then use a PSoC5 for which there is a development kit availlable with some more capabilities than a pioneer kit.
Bob
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
You can also consider -
1) PSOC 1, feed a BP filter (its switch cap filter) with a square wave
to gen a sine. No CPU intervention.
2) PSOC 4, use an OpAmp and/or comparator to create sine (wein bridge
osc), tri, ramp. No CPU intervention.
Regards, Dana.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi Dana,
Thanks... I think what I am going to try is an external R2R ladder and feed that back into an op-amp, so doing a poor mans external DAC.
http://www.tek.com/blog/tutorial-digital-analog-conversion-%E2%80%93-r-2r-dac
That way I am only using a hand full of SMT resistors and I can do some LUT and/or counter waveforms with the same digital outputs. I will post if I get something working.
Bill
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
That is a tried and true technique. Some considerations -
1) What resolution are you seeking ? # bits ?
2) Make R in absolute magnitude fairly high to negate effects of
PSOC GPIO Rdson when GPIO is at "1". You sacrifice speed
however by doing this.
3) You will have glitches due to unequal GPIO switching times
and also due to layout, stray C, etc.. Consider using OpAmp
as a S/H and disconnect it when updating ladder inputs, then
reconnect it. Then OpAmp will slew to final value.
4) What switching rate are you shooting for in the DAC, SPS ?
5) What waveforms are you trying to generate ?
Note there are a number of folks out there that offer precision
R-2R thin film ladder networks, sip packages, etcc. Vishay, Bournes,
BI.....
Regards, Dana.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi Dana,
Good point about the glitching... I am guessing that that will be of high enough frequency that I can add a cap or two (ala active filter) to suppress that in the voltage conversion (internal) op-amp.
I don't mean to be coy, but let me build what I am thinking about and post it when I am done...
Thanks again to you and Bob.
Bill
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Cypress released new variant of PSoC4 familiy "PSoC4A-M". This has the DMA feature. Hope this will help.
Rvi.