How to expand my Psoc5's flash

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Anonymous
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I want to expend the psoc5's flash memory for recording some data,beacuse the original size of flash is only 256kb ,so i think maybe link an external Flash memory would be better .

   

The size of the external Flash better be 8MB, would you please recommend some Flash for me?  

   

The chip model of the psoc5 is CY8C5868AXI-040.

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1 Solution
Anonymous
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 Also need to remember that the Erase/write cycle of flash is normally lower than EEPROM. Both type has pros and cons.

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14 Replies
Anonymous
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we used to use serial flash 25P80 from ST, but seems not making it anymore. Micron does have a whole series of serial flash, they have th 25P series upto 2Gb.

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HeLi_263931
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Cypress makes some non-volatile RAM / FRAM chips too: http://www.cypress.com/nonvolatile/?source=CY-ENG-HEADER

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ETRO_SSN583
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SDCARD is a natural for data logging. emFile component in

   

Crerator.

   

 

   

    

   

          

   

http://www.google.com/url?sa=t&rct=j&q=&esrc=s&source=web&cd=4&ved=0CDUQFjAD&url=http%3A%2F%2Fwww.so...

   

 

   

https://code.google.com/p/psoc3-5-sdcard-library/

   

 

   

This is for PSOC 4 -

   

 

   

    

   

   

          http://www.element14.com/community/thread/25517/l/psoc-4-pioneer-kit-community-project050-sd-card-ex...

   

   

 

   

Regards, Dana.

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HeLi_263931
Level 8
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One thing to look out for is block size. When working with flash memory, one usually needs to write full block (for the large ones this is typically 4k). So you would need to collect data in RAM to be able to write out one block at a time. Otherwise you need to read the block, add the new data and write it back (in effect this writes the block multiple times, wearing it faster).

   

For sizes up to 2MBit there are EEPROMs available, that can to byte-based writes (only delete needs to be done block-wise). The Cypress FRAMs and NVRAMs should be much better in that regard, too.

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Anonymous
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 The 25pe series has PAGE WRITE that you can program one byte upto one block. The rest of the block would be copied back with the new byte after the block being erased. Yes, it would means using one erase cycle, but that means you don't need to do operation of yourself, it is all taking care of by the chip.

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HeLi_263931
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Typically, the page size corresponds with the memory size. For the single MBit versions its most times like 128 or 256 bytes, for e.g. the 64MBit its in the 4k range.

   

OTOH the PAGE_WRITE functionality is surely nice and very helpful. In that regard this chips works more like an EEPROM...

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Anonymous
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Yes, it is handly but the downside is it takes a bit longer then EEPROM. So it is a trade off by the designer.

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Anonymous
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 Also need to remember that the Erase/write cycle of flash is normally lower than EEPROM. Both type has pros and cons.

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Anonymous
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 Luckly,I find the M25P32. But I don't know how to use the chip with psoc5.

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Anonymous
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 Would you please give me some example project about the M25P32?

   

THX

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HeLi_263931
Level 8
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There are a number of sample projects available for how to use I2C on the PSoC5. Just right-click on the component (in the component selector).

   

The read the datasheet for the M25P32, it explains in detail how to communicate with it (maybe start by reading the ID, the write something and read it back)

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Anonymous
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 The m25p series uses SPI.

   

Some suggestions

   

1. Control ths cs signal yourself. Do not use that from the compoment.

   

2. Make sure it is the right mode.

   

3. Try use slower speed first. Change it to a higher speed later.

   

4. Remember the dummy access for the 1st read.

   

5. Try to do read the id first as suggested by hli. Do the read/write later.

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Anonymous
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Hello!

   

How to make PSoC to boot and read program instructions from external ROM?

   

I think I need bootloader which will prepare memory read functions or remap address ranges.

   

Actually I don't know how.

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ETRO_SSN583
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The only way you could do this is load code segment into RAM and execute from

   

there with an ASM jump.

   

 

   

PSOC does not allow for internal address space to be exposed externally to

   

permit an address mapping decoding scheme.

   

 

   

Or a boot loader as you suggested.

   

 

   

    

   

          

   

http://www.cypress.com/?rID=50230     AN68272 UART BL     PSOC 3, 4, 5LP

   

http://www.cypress.com/?rID=41002     AN60317 I2C BL         PSOC 3, 5LP

   

http://www.cypress.com/?rID=57561     AN73503 USB HID BL with GUI Host     PSOC 3, 5LP

   

http://www.cypress.com/?rID=56014     PSoC® 3, PSoC 4, and PSoC 5LP Introduction To Bootloaders

   

http://www.cypress.com/?rID=83293     AN86526 - PSoC® 4  I2C Bootloader

   

http://www.cypress.com/?rID=50230     AN68272 - PSoC® 3, PSoC 4 and PSoC 5LP UART Bootloader

   

 

   

 

   

Regards, Dana.

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