SPI Slave ADC problem

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Anonymous
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 when i built i got problem like this, what it's mean? and can you help?

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Bob_Marlowe
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Have a look into this document. Additionally, can you post your complete project, so that we all can have a look at all of your settings? To do so, use
Creator->File->Create Workspace Bundle (minimal)
and attach the resulting file.



Bob
 

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Anonymous
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 this is my project, i used psoc creator 3.1

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Bob_Marlowe
Level 10
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Please use
Creator->File->Create Workspace Bundle (minimal)
and attach the resulting file. No .raw

   

 

   

Bob

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ETRO_SSN583
Level 9
Level 9
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Your .rar archive is fine to post.

   

 

   

I looked at compile, kept getting SPIM timing errors and the analog route error.

   

I found a small line segment unconnected hidden under wire pin to ADC in,

   

that still did not fix the error. I eliminated ADC, compiled, error gone, then did

   

a clean and build and placed delsig again, again the error shows up.

   

 

   

So I am going to suggest filing a CASE.

   

 

   

Insofar as SPI, I played around with clocks, data rates, stone wall results.

   

 

   

    

   

         

   

To create a technical or issue case at Cypress -

   

 

   

www.cypress.com

   

“Support”

   

“Technical Support”

   

“Create a Case”

   

 

   

You have to be registered on Cypress web site first.

   

 

   

Plase post bacl results, I am curious about SPI setup time violation problem.

   

 

   

Regards, Dana.

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