PSoC 4 - Study of pin toggle max speed,  comparison of several ways of toggle.

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Anonymous
Not applicable

 Hello,

   

In attachment i send an PSoC 4 example project that compares the several ways to toggle a pin.     

 

   

 

   

#include <project.h>     

 

   

 

   

volatile uint32 volatile_reg_val_1;     

 

   

volatile uint32 volatile_reg_val_0;     

 

   

 

   

int main()     

 

   

{     

 

   

        

 

   

    // Settings:     

 

   

    //    3.3V 48MHZ  Compilation in Release mode.     

 

   

    //    Note: Sould be equal with 5V.     

 

   

        

 

   

        

 

   

    ///////////////////     

 

   

    // Hardware Max Speed     

 

   

        

 

   

    ///////////     

 

   

    // Case 6   Pin toogle max speed: 24MHz     

 

   

    ///////////     

 

   

        

 

   

    Clock_HD_MAX_SPEED_Start();     

 

   

    PWM_hardware_max_speed_Start();     

 

   

    ////////////////////        

 

   

        

 

   

    ////////     

 

   

    // Note: Pin_Soft is the name od the pin componente in the diagram.     

 

   

        

 

   

    Pin_Soft_DR    |= Pin_Soft_MASK;   // Sets pin     

 

   

    volatile_reg_val_1 = Pin_Soft_DR;     

 

   

    Pin_Soft_DR    &= ~Pin_Soft_MASK;  // Clear pin     

 

   

    volatile_reg_val_0 = Pin_Soft_DR;     

 

   

        

 

   

    for(;;)     

 

   

    {     

 

   

        ///////////     

 

   

        // Case 1     Pin toogle max speed: 855KHz     

 

   

        ///////////     

 

   

            

 

   

        // Slowest.     

 

   

        Pin_Soft_Write(0u);    // Clear pin     

 

   

        Pin_Soft_Write(1u);    // Set pin     

 

   

        Pin_Soft_Write(0u);    // Clear pin     

 

   

 

   

        ///////////     

 

   

        // Case 2     Pin toogle max speed: 2.65MHz     

 

   

        ///////////     

 

   

            

 

   

        // Intermediate speed (equal speed to the next case, safe way)     

 

   

        CyPins_ClearPin(Pin_Soft_0);  // Clear pin     

 

   

        CyPins_SetPin(Pin_Soft_0);    // Set pin     

 

   

        CyPins_ClearPin(Pin_Soft_0);  // Clear pin     

 

   

 

   

        ///////////     

 

   

        // Case 3     Pin toogle max speed: 2.65MHz     

 

   

        ///////////     

 

   

            

 

   

        // Intermediate speed (equal speed to the next case, safe way)     

 

   

        Pin_Soft_DR &= ~Pin_Soft_MASK;  // Clear pin     

 

   

        Pin_Soft_DR |= Pin_Soft_MASK;   // Sets pin     

 

   

        Pin_Soft_DR &= ~Pin_Soft_MASK;  // Clear pin     

 

   

        

 

   

        ///////////     

 

   

        // Case 4     Pin toogle max speed: 4MHZ     

 

   

        ///////////     

 

   

            

 

   

        // Second fastest speed (equal speed to the next case, unsafe way)     

 

   

        // Volatile.     

 

   

        Pin_Soft_DR = volatile_reg_val_0;   // Clear pin (afects all register (dangerous because can afect all bits)     

 

   

        Pin_Soft_DR = volatile_reg_val_1;   // Sets pin (afects all register  (    "  )     

 

   

        Pin_Soft_DR = volatile_reg_val_0;   // Clear pin (afects all register (    "  )     

 

   

 

   

                   

 

   

        ///////////     

 

   

        // Case 5     Pin toogle max speed: 6MHz     

 

   

        ///////////     

 

   

                   

 

   

        uint32 local_val_1 = volatile_reg_val_1;     

 

   

        uint32 local_val_0 = volatile_reg_val_0;     

 

   

            

 

   

        // Fastest speed (equal speed to the previous case, unsafe way)     

 

   

        // Without volatile varibels [it uses only one ARM assembly instruction the STR [store to register],     

 

   

        // because the value of one and zero is already in the register].     

 

   

        Pin_Soft_DR = local_val_0;   // Clear pin (afects all register (dangerous because can afect all bits)     

 

   

        Pin_Soft_DR = local_val_1;   // Sets pin (afects all register  (    "  )     

 

   

        Pin_Soft_DR = local_val_0;   // Clear pin (afects all register (    "  )     

 

   

    }     

 

   

            

 

   

}     

 

   

 

   

Best regards,     

 

   

João Nuno Carvalho      

 

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7 Replies
ETRO_SSN583
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48 Mhz but waveform poor.

   

 

   

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user_284806
Level 2
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Is it the 50, 70 or 100MHz version? And how are you physically doing the measurement?

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ETRO_SSN583
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 Was done on a CY8CKIT-042 board.

   

 

   

Measuring with Rigol Scope.

   

 

   

The 24 Mhz was done with this -

   

 

   

   

 

   

The 48 Mhz with this -

   

 

   

   

 

   

Regards, Dana.

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Anonymous
Not applicable

 Hello,

   

I didn’t know that it was possible to put the clock directly into a pin, nice.

   

What I think Njay was asking was the bandwidth of the Rigol Scope, there are 50MHz, 70MHz and 100MHz models for that particular scope, and if you were using the 50MHz scope model, it doesn’t change the sampled wave for a 50MHz sine wave more than 3db, if I understand correctly, but here  you are measuring a 48MHZ square wave that has a faster transition that a pure sinewave, and that means that same of the distortions from  square wave can come from the scope itself.

   

 

   

Thank you,

   

Best regards,

   

João Nuno Carvalho

   
        
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ETRO_SSN583
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I used 2 scopes, Rigol 100 Mhz, 500 Msps on each of the 2 channels

   

used, and a Tek TDS754A, 2 Gsps on each of 2 channels used, 500 Mhz.

   

 

   

500 Mhz probes on Tek, Rigol probes are 150 Mhz. Only key difference was

   

a few mV of over/under shoot between the 2 scopes.

   

 

   

I have a 7000 mainframe 10 Ghz sampler, but its a pain in the arse to set up and trigger

   

properly.

   

 

   

I have ~ 45 scopes, I collect them. Only key Tek one I am missing is 519, first  1 Ghz built

   

in early 1960's, vacuum tube. Also have a 7104, full analog 1 Ghz, for times when DSOs mislead.

   

 

   

Regards, Dana.

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Anonymous
Not applicable

 In that case the distortion is from the chip I0 driver,

   

I’m sorry to bring the theme up because you clearly know much more than me about this matter.     

   

Until now I only had 3 scopes one of 60MHz LG, then one Rigol 50MHz and now one Rigol 100MHz, and those were not Tek grade scopes    🙂     

   

 

   

I have one more question to ask you, I don’t have the PSoC 5 LP, I’m waiting for the 059-KIT to try them. Can the PSoC 5 80MHz generate a better and/or faster signal than the PSoC 4?     

   

 

   

Thank you,     

   

Best regards,     

   

João Nuno Carvalho     

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ETRO_SSN583
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The PSOC 5LP probably will look pretty much the same as its outputs,

   

as rated by datasheet. Keep in mind its available current from output

   

that drives Cload. Its a little more complicated getting MOSFET thru linear

   

region to turn on fully saturated due to Miller effect.

   

 

   

   

 

   

The DC drive specs of both families on GPIO look ~ same, So I would posit

   

signal integrity ~ same.

   

 

   

Regards, Dana.

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