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PSoC 4100/4200 Family PSoC 4 Architecture TRM, Document No. 001-85634 Rev. *A
9.3.2.3 Low-Voltage-Detect (LVD)
When is an interrupt generated? Only on the event when the supply voltage drops below monitored level or while the status is active?
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The ISR becomes active at the LVD setpoint, and remains active until
cleared by API. See LVD APIs in System Ref manual in Creator help.
Regards, Dana.
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Hello Dana,
thanks for your help! I found in the Document (001-87820, Rev. *A) a description for the PSoC3/5 LVD, but only a API description for the PSoC4. So I assume, that the description from PSoC3/5 is also valid for the PSoC4. Am I right?
I don't really understand the term "duration that the event is occurring". What is meant with the event, while the voltage is dropping (edge) or while the voltage is below the monitored level (status)? So is the interrupt only generated once with the edge or repeated with the status? Where can I register the interrupt function? Or is this only a pseudo interrupt? Do I get a further interrupt, when the voltage is recovering?
Regards Chris
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What is meant with the event, while the voltage is dropping (edge) or while the voltage is below the monitored level (status)?
The latter case.
So is the interrupt only generated once with the edge or repeated with the status?
I believe it stays pending as long as V is below setpoint. You mighty consider filing a CASE
to insure you get accurate answer.
Where can I register the interrupt function? Or is this only a pseudo interrupt?
Use the global signal reference component, in System group of components, and an ISR component
attached to it.
Do I get a further interrupt, when the voltage is recovering?
Quite possibly if system noise is present. That's a question you might ask in CASE,
how much hysterisis is there in recovery.
Regards, Dana.
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What is meant with the event, while the voltage is dropping (edge) or while the voltage is below the monitored level (status)?
The latter case.
So is the interrupt only generated once with the edge or repeated with the status?
I believe it stays pending as long as V is below setpoint. You mighty consider filing a CASE
to insure you get accurate answer.
Where can I register the interrupt function? Or is this only a pseudo interrupt?
Use the global signal reference component, in System group of components, and an ISR component
attached to it.
Do I get a further interrupt, when the voltage is recovering?
Quite possibly if system noise is present. That's a question you might ask in CASE,
how much hysterisis is there in recovery.
Regards, Dana.
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Thanks for your help. I'll create a case on this and let you know about the results. 🙂
Regards, Chris