Noise in ADC (in my own board).

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HaHa_285681
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Have somebody experience how to create a board for PSOC 5 LP? 
Below you can find my own one ,  unfortunately I get unwanted noises in ADC.
Could somebody say what is the problem?
Thank you for your time.

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ETRO_SSN583
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See attached.

   

 

   

Regards, Dana.

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ETRO_SSN583
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See attached.

   

 

   

Regards, Dana.

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rola_264706
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Looking at your design. I have no Ideal what traces on your board are the analog traces but I'll give you some advice on how it should be done. Analog traces should not cross digital traces unless at right angles.  All analog grounds should be at one place called  a star ground. You should have a power plane and a ground plane and a digital signal plane.  The analog plane should have shielded traces that is the analog signal traces run inside the analog ground plane.

   

 analog ground plane -----------------------------------------------------------------------------------

   

analog signal             -----------------------------------------------------------------------------------

   

analog ground plane ------------------------------------------------------------------------------------

   
   
   
   

like the lines above two outside lines analog ground plane inner line is the analog signal.  Also the correct bypass caps you can never have too many.

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ETRO_SSN583
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For bypass caps pay particular attention to the actual datasheet performance of F vs Z.

   

Not all .1 uF Ceramics are equal.

   

 

   

For bulk caps polymer tants have ~ 1 order of magnitude better F vs Z over

   

traditional tants.

   

 

   

In the drop box link I gave you are some thorough ap notes on PCB

   

layout and other noise sources, worth perusing.

   

 

   

Regards, Dana.

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HaHa_285681
Level 3
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Thanks I am trying to build new one ,  I hope will avoid from noise.

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ETRO_SSN583
Level 9
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Another useful exercise is set you scope for infinite persistence and look at various

   

grounds and supply pins to see which ones have the greatest problem. Also if your

   

PSOC allows external bypass of reference, incorporate that into design.

   

 

   

When looking at grounds with scope probe ground lead should be connected to

   

ground point where power enters board.

   

 

   

Regards, Dana.

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