SPIS Example ( DMA ) STA violation at 66 MHz MASTER CLK

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Anonymous
Not applicable

Hi,

   

I am playing with the SPIS example, created by Creator 3.3 for PSoC 5.

   

It compile without problems at 24 MHz MASTER / BUS CLK

   

 

   

If PLL is changed from 24 to 66 MHz ( to increase CPU speed ) STA M0019 warnings are reported.

   

It looks like SPIS to DMA interrupt connection timing problem.

   

Is there a way around this, and still have full CPU speed ?

   

 

   

SPIM Example doesn't seem to have this problem ?

   

 

   

Thanks

   

Geert   

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4 Replies
Bob_Marlowe
Level 10
Level 10
First like given 50 questions asked 10 questions asked

Geert, can you upload your non-working example here so that we all can have a look at all of your settings? To do so, use
Creator->File->Create Workspace Bundle (minimal)
and attach the resulting file.

   

 

   

Bob

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HeLi_263931
Level 8
Level 8
100 solutions authored 50 solutions authored 25 solutions authored

How do you generate the clock for the SPIM component? make sure its not higher than the maximum support frequency for this component (look at the data sheet - its 36MHz at most).

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Anonymous
Not applicable

Well, it is the SPIS example provided by Cypress.

   

PLL_OUT is changed from 24 to 66 MHz to get higher CPU speed.

   

It is just compiled, not run on any hardware.

   

Please find it attached

   

/Geert

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Anonymous
Not applicable

I have now run the SPIS example on a CY8CKIT-059 board @ 66MHz, and it seem to work, despite the STA warnings.

   

However I still think it is odd to get warnings in this example.

   

 

   

/Geert 

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