BLE stack optimization in CY4247

[Anonymous]

Hello Folks,

   

I need to add a good amount of code but the BLE stack is occupying almost 69% of flash and SRAM use is nearing 98%. For SRAM, I found http://www.cypress.com/blog/psoc-creator-news-and-information/controlling-sram-usage-psoc-applicatio....  But I am still looking for BLE flash reduction.  Does any way exists?  Thanks in advance.

   

-gits

[Anonymous · Accepted solution]

Hi Gitesh,

   

The BLE stack is already optimized to the best of options (optimization size) and then the library is created. But what you can expect to reduce is the flash requirement of the rest of the application. If your code is already optimized, then I would suggest you to use ARM MDK compilers (you can buy the license).

   

But again, there is only so much code you can optimize and if you anticipate a very big application, then I suggest you to use the PSoC 4 BLE 256K BLE modules, that provides you 256K of flash and 32K of SRAM. You can buy samples from http://www.cypress.com/products/psoc-4-ble-bluetooth-smart. 

[Anonymous]

Thanks @roit.  Is removing code not needed in BLE stack (non-SIG compliant stack is okay) be done in any way? Else I will look for the upgraded version of device.

[Anonymous]

Gitesh,

   

Cypress provides fully SIG complaint BLE stack. Removing code and compromising the compliance may not be an option.