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It looks like the MCLK for CYL10563 is input, But I need it to output the mclk for codec IC, any way?
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Yes, the PWM should be used for generating the MCLK as well as feed the I2S component block, so to prevent mismatch of the clock sync between the MCLK and BCLK/LRCLK from I2S.
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Do you mean the PSoc chip for the PSoc Ble module with a CYBL10563-56LQXI PSoc Chip? If so you could use the clock component and run that to a digital pin for an output or you could use Global signal Reference component to run a WDT to your external device. The
CYBL10563-56LQXI PSoc Chip has limited resources you may want to upgrade to the PSOC 4 Ble for more resoureces.
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Thanks for your reply. Yeath , the ADC codec IC need an MCLK input, And I do not want to add an oscillator for cost limitation. I want to use a pwm to output the MCLK , Is it possible? The codec sample rate is 8K, and the I2S word size is 16bit,So it need an 2.048M MCLK.
Clock component or Global signal Reference component? The document for CYBL10563 is very scattered, can it be more detailed?
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Yes, the PWM should be used for generating the MCLK as well as feed the I2S component block, so to prevent mismatch of the clock sync between the MCLK and BCLK/LRCLK from I2S.