How to read a register in a schematic component

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PeWa_1510206
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I've learned how to access control registers and write to status registers from within a schematic component, but how do you read from a registers defined in another component?

   

I'm attempting to make an SPI slave which takes two bytes of input: <read/write + address> <data to write or 0x00>

   

As output, it gives: <data for read or 0x00>

   

Read / Write is the MSb in the first byte. Address is a 7-bit memory address. I'd like to make a schematic component which will examine the MSb and then fire off either a DMA read or DMA write to the specified address.

   

My problem is: How do I access the SPI data from a schematic component? I.e. to get the data sent in, I'd like to access RXDATA_REG and then make decisions based on that.

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odissey1
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        From main MyComponentName_RXDATA_REG_...   

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PeWa_1510206
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I've been thinking about this more. Do I need to use DMA for what I want to do? i.e.

   

[SPI RXDATA_REG] --DMA Transfer-->[Custom Component Control Reg]

   

Then I would set up the TD for this in main.c. Is this overkill? Do I always need to use DMA to transfer register contents from one component to another?

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odissey1
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        From main MyComponentName_RXDATA_REG_...   
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I'm trying to avoid using the firmware. I'd like to just use UDB and PLD blocks to process SPI information.

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Bob_Marlowe
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DMA is just Direct Memory Access. so all you can do there can be done with the CPU: reading a register and writing to another.

   

There are no fixed names for all the components to read a register, but for getting and putting values there always are the APIs. You may have a look at them in the generated sources to see how they work and use the register names directly if you like, but usually there are some additional tests performed as checking for data available etc.

   

 

   

Bob

Are you saying I have to use the CPU to read and write registers? I'd like to get data from the SPI Slave component (which I placed in TopDesign) and use that data in another component I'm making (a schematic component in my case, not a Verilog component or UDB component). So to read incoming SPI data in my component, do I have to do this:

   
SPI Slave -> CPU -> Custom Component
   

I thought maybe I could share data between the two without CPU intervention.

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Bob_Marlowe
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Only way without CPU intervention is DMA. There are no other connections within a PSoC. You need to dig out the destination address name of your register from your generated sources. Then you can setup the DMA. What is the SPI speed (chars/s) you are running at?

   

I just re-red your specifications. "Firing off a DMA" takes a reasonable amount of setup time for the CPU. DMA is worthy only when you transmit several bytes automatically, otherwise an interrupt handler can be more effective.

   

 

   

Bob

Ah. So attempting to do all of my processing outside of the CPU might not even be prudent.

   

I have control over the SPI speed since I'm configuring both the master and the slave. Right now I'm using a 250khz clock (8-bit words). I was hoping to try testing at 10Mhz, though.

   

What I'm attempting to do is make an "emulated" LIS3DH accelerometer for automated testing of the rest of my system, and I'm trying to use a PSOC part for my drop-in LIS3DH replacement. The system looks like this:

   
LIS3DH <= SPI => Host Processor (Nordic nRF51) <- Bluetooth LE -> PC
   

The problem is that it's difficult to run automated tests with a real accelerometer in the system. Instead I'd like to do this:

   
PC <= USB => PSoC <= SPI => Host Processor (Nordic nRF51) <- Bluetooth LE -> PC
   

This way the PC can tell the PSoC to use pre-defined acceleration data (sent over USB). The host processor thinks its talking to a LIS3DH and sends its output back to the PC via Bluetooth LE. This makes it possible to run an automated system test without physically manipulating the accelerometer.

   

Also, this whole project (an LIS3DH replacement) is an excuse to learn how to use the PSoC system (which I've never done before). I come from a software engineering background, so it's easy for me to give up and just do all processing in the CPU by writing C code, but I'd like to learn how to do as much as I can in Schematic sheets, Verilog, and UDBs.

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PeWa_1510206
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I've attempted to do all my processing in an ISR and send the data back out on the bus with SPIS_WriteTxDataZero(). My issue is that even at an SCK of 250kHz, my ISR runs too long (it takes about 4.16 us). I can see this by toggling a pin when I enter or exit my ISR and observing it on my logic analyzer.

   

After the SPI master clocks in the first byte of its transmission, I need to read one of 49 values from memory and then start sending it out as the master continues clocking out my data with SCK. This means I need to do all my ISR in roughly half of an SCK clock cycle. I've attached an image that shows how my ISR extends into the MSB of the data I want to return to the master.

   

Perhaps I can optimize my ISR a little, but I'd like to run the SPI clock from the master up to 10MHz. I know I can't optimize that much. Can I still use the SPI slave component that comes with PSoC Creator? Is this a situation where I'll need to write my own slave in Verilog and put my 49 values in Verilog registers instead of SRAM?

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Bob_Marlowe
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You do not have 49 registers in verilog.

   

Did you already compile in "Release" setting?

   

 

   

Bob

Compiling in release helps--that brings me down to about 2us. So I can run SCK at 250kHz now.

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Bob_Marlowe
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... and to squeeze out the last µs try to set in release mode the optimization level from "Size" to "Speed"

   

 

   

Bob

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odissey1
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peter.watkins,

   

from the datasheet, "The LIS3DH ... is capable of measuring accelerations with output data rates from 1 Hz to 5 kHz" -  does not sound terribly fast to overload PSoC. Other thing, do you use Pin_Write(1)/Pin_Write(0) in the ISR to measure elapsed time? If so, this is slow way to toggle pin and takes about 1us by itself (half of ISR time).  

I'm addressing the pin registers directly. i.e.:

   

ISR_Started_DR |= ISR_Started_MASK;

   

ISR_Started_DR &= ~ISR_Started_MASK;

   

 

   

Just to be clear--I'm not reading from an LIS3DH with the PSoC. I'm using the PSoC to "emulate" a LIS3DH. The PSoC appears to be a LIS3DH to the host processor in the system I'm testing. This allows me to run automated tests without a real LIS3DH (I don't want to manually move the circuit board during an automated test).

   

So the issue is getting the PSoC to match the SPI slave behavior of the LIS3DH. In the LIS3DH, the first byte over SPI is the address of the register you want to read / write. The second byte is the data. There is no delay between these two bytes other than the delay inherent in one SPI clock cycle (be that 250kHz or 10MHz). This means that when I see a byte that comes over SPI which says, "Read from address 0x20", I have roughly half an SPI clock cycle to read from that location in the PSoC's SRAM and start clocking the value out over SPI.

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Bob_Marlowe
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I had to read out a similar accelerometer from st using a PSoC4 and when I used the internal 32-value buffer I could reduce the overhead of addressing the chip's registers to a minimum. Just a thought.

   

 

   

Bob

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Was your PSoC 4 the SPI master or slave? In my case, I'm using the PSoC to stand in for an LIS3DH--it's the slave.

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