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Hi,
I'm new in Cypress MCU's and have some issues while using the internal UART clock (UART [v.2.50]). My development environment is based on CY8CKIT-042-BLE Pioneer Kit in combination with a CYBLE-014008-00 BLE Module.
I'm not able to fix the following warning message:
"sta.M0019:Warning-1366: Setup time violation found in a path from clock (CyHFCLK) to clock (UART_IntClock)."
Please have a look at my attached project.
Thanks in advance!
Pascal
Solved! Go to Solution.
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I lowered the HFCLK to 36MHz and removed the TxEnable from UART component.
Bob
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I cannot open your projects, probably because some of the files reside in a different path. try to send both projects separately and use "Creator->File->Create Workspace Bundle". Which of the projects show the error?
Bob
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Nice that works! Thanks