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Hi, I'm designing a 'hardware only' 3 channel DAQ system using an Analog Mux, DelSig ADC, and DMA. The ADC is hardware triggered at a 500us rate, with a channel sample rate about 20 times faster. (I'm sampling a 3PH power line). A uint16 by 3Channel by 1K circular software buffer is filled via DMA. The hardware and DMA are working just fine.
My problem is at some asynchronous time, a hardware interrupt is generated and I need to transfer the ADC circular software buffer to another memory location for processing. To do this I need a Head Pointer into the buffer. The PSoC 4200M has the API function 'CyDmaGetDescriptorStatus' which returns the CYDMA_TRANSFER_INDEX from the Transaction Descriptor. I need this functionality from the PSoC 5LP DMA v1.70 component.
2nd, (less Important question) Is it possible to configure multiple linked TD's that would allow DMA to fill 3 separate uint16 by 1K circular ADC buffers, (one for each channel), so I don't have to deal with interleaved channel data in software? I have reviewed the 'DelSig_16Channel' example but it is 1-dimensional: (1 sample per channel), I need a 2-dimensional solution: ( 3ea 1K circular buffers).
Note: the ADC circular software buffer is always full, so I don't need a Tail Pointer, and I don't want any ISR involved with the hardware ADC sampling.
Any suggestions?
Thanks,
Gary Beam
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2) Look at AN52705, example 5 - it explains how to chain TDs to fill two buffers in a page-mode.
1) you could read the TD data directly, it stores the current target address. AN84810 (advanced DMA topics) show how to modify a TD on-the-fly, you just need to do the reverse.
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2) Look at AN52705, example 5 - it explains how to chain TDs to fill two buffers in a page-mode.
1) you could read the TD data directly, it stores the current target address. AN84810 (advanced DMA topics) show how to modify a TD on-the-fly, you just need to do the reverse.